Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47530 )
Change subject: soc/intel/common/p2sb: Add helper function to determine p2sb state ......................................................................
soc/intel/common/p2sb: Add helper function to determine p2sb state
Change-Id: I1d6f9c18160806e289e98c2fa5d290c61434112f Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/common/block/p2sb/p2sb.c 1 file changed, 16 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/47530/1
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index d97cd8d..b5f9a07 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -15,6 +15,20 @@
#define HIDE_BIT (1 << 0)
+static bool p2sb_is_hiden(void) +{ + bool valid_vid = pci_read_config16(PCH_DEV_P2SB, PCI_VENDOR_ID) == + PCI_VENDOR_ID_INTEL; + bool read_ones = pci_read_config16(PCH_DEV_P2SB, PCI_VENDOR_ID) == 0xffff; + + if (read_ones) + return true; + if (valid_vid) + return false; + printk(BIOS_ERR, "P2SB PCI_VENDOR_ID is invalid, unknown if hidden\n"); + return true; +} + void p2sb_enable_bar(void) { /* Enable PCR Base address in PCH */ @@ -59,8 +73,7 @@ { p2sb_set_hide_bit(0);
- if (pci_read_config16(PCH_DEV_P2SB, PCI_VENDOR_ID) != - PCI_VENDOR_ID_INTEL) + if (p2sb_is_hiden()) die_with_post_code(POST_HW_INIT_FAILURE, "Unable to unhide PCH_DEV_P2SB device !\n"); } @@ -69,8 +82,7 @@ { p2sb_set_hide_bit(1);
- if (pci_read_config16(PCH_DEV_P2SB, PCI_VENDOR_ID) != - 0xFFFF) + if (!p2sb_is_hiden()) die_with_post_code(POST_HW_INIT_FAILURE, "Unable to hide PCH_DEV_P2SB device !\n"); }