[coreboot-gerrit] Change in coreboot[master]: soc/intel/braswell: Update microcode before FSP

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36198 )

Change subject: soc/intel/braswell: Update microcode before FSP
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Patch Set 3:
> Patch Set 3:
>
> Any boot time penalty?

Typically you don't have many different MCU included on these SOC. So you have to loop through 2-4 offset and then do the update. Previously this was done in the romcc bootblock so it should not present a big regression. The follow up patch (with fake MCU) might actually provide a speedup since the FSP only has to loop once through the MCU.