Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39346 )
Change subject: oc/intel/tigerlake: Add processor power limits control support ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39346/5/src/soc/intel/tigerlake/chi... File src/soc/intel/tigerlake/chip.h:
https://review.coreboot.org/c/coreboot/+/39346/5/src/soc/intel/tigerlake/chi... PS5, Line 174: psys_pmax This isn't used anywhere; is that intentional?
https://review.coreboot.org/c/coreboot/+/39346/5/src/soc/intel/tigerlake/cpu... File src/soc/intel/tigerlake/cpu.c:
https://review.coreboot.org/c/coreboot/+/39346/5/src/soc/intel/tigerlake/cpu... PS5, Line 218: MCH_DDR_POWER_LIMIT_LO I don't see coreboot setting these, are these set by FSP-M?
https://review.coreboot.org/c/coreboot/+/39346/5/src/soc/intel/tigerlake/sys... File src/soc/intel/tigerlake/systemagent.c:
https://review.coreboot.org/c/coreboot/+/39346/5/src/soc/intel/tigerlake/sys... PS5, Line 86: 28 Could we get a symbolic constant for this? Something like MOBILE_SKU_PL1_TIME_SEC ?