Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34995 )
Change subject: arch/x86: Cache the TSEG region at the top of ram ......................................................................
Patch Set 12:
(2 comments)
https://review.coreboot.org/c/coreboot/+/34995/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34995/11//COMMIT_MSG@23 PS11, Line 23:
Measurements belong to the commit where CML calls the function added here.
Done
https://review.coreboot.org/c/coreboot/+/34995/11/src/arch/x86/include/arch/... File src/arch/x86/include/arch/romstage.h:
https://review.coreboot.org/c/coreboot/+/34995/11/src/arch/x86/include/arch/... PS11, Line 98: void enable_tseg_cache(struct postcar_frame *pcf);
Probably should have postcar in the API name for consistency.
Done