Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30864
Change subject: soc/intel/cannonlake: Hook Microcode ......................................................................
soc/intel/cannonlake: Hook Microcode
Hook Coffeelake U43e and Coffeelake H/S/E3 microcode into SOC and remove the MICROCODE_BLOB_NOT_HOOKED_UP.
BUG=N/A TEST=Boot up with coffeelake rvp board and check microcode revision in coreboot log.
Signed-off-by: Lijian Zhao lijian.zhao@intel.com Change-Id: I6593081374dd4898a82db5b43c3b5bf154b3ef60 --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc 2 files changed, 5 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/30864/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index a3390d8..f8193cd 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -46,7 +46,6 @@ select PARALLEL_MP select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 - select MICROCODE_BLOB_NOT_HOOKED_UP select POSTCAR_CONSOLE select POSTCAR_STAGE select REG_SCRIPT diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index fb2c849..b2ba0fd 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -87,6 +87,11 @@ verstage-y += gpio.c endif
+# Coffeelake U43e D0 +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin +# Coffeelake H/S/E3 B0 U0 +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_906ex/microcode.bin + CPPFLAGS_common += -I$(src)/soc/intel/cannonlake CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include