[coreboot-gerrit] Change in coreboot[master]: cpu/intel/car: Skip stack integrity check if FSP_USES_CB_STACK is enable

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35165 )

Change subject: cpu/intel/car: Skip stack integrity check if FSP_USES_CB_STACK is enable
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35165/2/src/cpu/intel/car/romstage.... 
File src/cpu/intel/car/romstage.c:

https://review.coreboot.org/c/coreboot/+/35165/2/src/cpu/intel/car/romstage.... 
PS2, Line 63: 	if (!CONFIG(FSP_USES_CB_STACK)) {
So by this logic, the stack_guard should not be created when FSP_USES_CB_STACK is enabled either.  But I would think we still want some kind of assurance that the stack hasn't been trashed.  How can we make this work, Subrata, when FSP & coreboot "share" the stack?  Can we get HOB size requirements so we can carve out a separate chunk of memory there exclusively for their use?  How do we know that FSP-S hasn't "smashed" the stack for real and overwritten all the HOBs as well?