Ravishankar Sarawadi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37781 )
Change subject: soc/intel/tigerlake: Update ACPI files ......................................................................
Patch Set 4:
(14 comments)
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/northbridge.asl:
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... PS2, Line 311: F
Recent merged patch has fix for this address
Done
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/norththbridge.asl:
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... PS2, Line 1: /* : * This file is part of the coreboot project. : * : * Copyright (C) 2019 Intel Corp. : * : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; either version 2 of the License, or : * (at your option) any later version. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details. : */
Delete this file
Done
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pch_clock_ctl.asl:
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... PS2, Line 25: //
Use C stlye comments like other ASL
Done
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... PS2, Line 42: // : // Number Of Clocks : //
Use C stlye comments like other ASL
Done
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... PS2, Line 56: // : // Arg0 - Clock number (0:IMGCLKOUT_0, etc) : // Arg1 - Desired state (0:Disable, 1:Enable) : //
Use C stlye comments like other ASL
Done
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... PS2, Line 95: // : // Clock Frequency : //
Use C stlye comments like other ASL
Done
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... PS2, Line 100: // : // Arg0 - Clock number (0:IMGCLKOUT_0, etc) : // Arg1 - Clock frequency (0:24MHz, 1:19.2MHz) : /
Use C stlye comments like other ASL
Done
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... PS2, Line 139: //---------------------------------------------------------------------------------------- : // Clock control Method : // Arg0: Clock source select (0: IMGCLKOUT_0, 1: IMGCLKOUT_1, 2: IMGCLKOUT_2, 3: IMGCLKOUT_3, 4: IMGCLKOUT_4) : // Arg1: Clock Enable / Disable (0: Disable, 1: Enable) : // Arg2: Select 24MHz / 19.2 MHz (0: 24MHz, 1: 19.2MHz : //---------------------------------------------------------------------------------------
Use C stlye comments like other ASL
Done
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pcie.asl:
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... PS2, Line 384: Device (TBT1) : { : Name (_ADR, 0x001D0008) : : OperationRegion (RPCS, PCI_Config, 0x4c, 4) : Field (RPCS, AnyAcc, NoLock, Preserve) : { : , 24, : RPPN, 8, /* Root Port Number */ : } : : Method (_PRT) : { : Return (IRQM (RPPN)) : } : } : : Device (TBT2) : { : Name (_ADR, 0x001D0009) : : OperationRegion (RPCS, PCI_Config, 0x4c, 4) : Field (RPCS, AnyAcc, NoLock, Preserve) : { : , 24, : RPPN, 8, /* Root Port Number */ : } : : Method (_PRT) : { : Return (IRQM (RPPN)) : } : } : : Device (TBT3) : { : Name (_ADR, 0x001D000A) : : OperationRegion (RPCS, PCI_Config, 0x4c, 4) : Field (RPCS, AnyAcc, NoLock, Preserve) : { : , 24, : RPPN, 8, /* Root Port Number */ : } : : Method (_PRT) : { : Return (IRQM (RPPN)) : } : } : : Device (TBT4) : { : Name (_ADR, 0x001D000B) : : OperationRegion (RPCS, PCI_Config, 0x4c, 4) : Field (RPCS, AnyAcc, NoLock, Preserve) : { : , 24, : RPPN, 8, /* Root Port Number */ : } : : Method (_PRT) : { : Return (IRQM (RPPN)) : } : } :
Remove
Done
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/37781/2/src/soc/intel/tigerlake/acp... PS2, Line 17: // Intel PMC Controller 0:1f.2
C sytle comments
Done
https://review.coreboot.org/c/coreboot/+/37781/3/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/serialio.asl:
https://review.coreboot.org/c/coreboot/+/37781/3/src/soc/intel/tigerlake/acp... PS3, Line 66: Device (I2C6) : { : Name (_ADR, 0x00100000) : Name (_DDN, "Serial IO I2C Controller 6") : Method (_PS0) { } : Method (_PS3) { } : } : : Device (I2C7) : { : Name (_ADR, 0x00100001) : Name (_DDN, "Serial IO I2C Controller 7") : Method (_PS0) { } : Method (_PS3) { } : }
Delete this according to SOC_INTEL_I2C_DEV_MAX: 6 in Kconfig
Done
https://review.coreboot.org/c/coreboot/+/37781/3/src/soc/intel/tigerlake/acp... PS3, Line 116: Device (SPI4) : { : Name (_ADR, 0x00130001) : Name (_DDN, "Serial IO SPI Controller 4") : Method (_PS0) { } : Method (_PS3) { } : } : : Device (SPI5) : { : Name (_ADR, 0x00130002) : Name (_DDN, "Serial IO SPI Controller 5") : Method (_PS0) { } : Method (_PS3) { } : } : : Device (SPI6) : { : Name (_ADR, 0x00130003) : Name (_DDN, "Serial IO SPI Controller 6") : Method (_PS0) { } : Method (_PS3) { } : } :
Delete this according to SOC_INTEL_COMMON_BLOCK_GSPI_MAX: 4 in Kconfig
Done
https://review.coreboot.org/c/coreboot/+/37781/3/src/soc/intel/tigerlake/acp... PS3, Line 165: Device (UAR3) : { : Name (_ADR, 0x00110000) : Name (_DDN, "Serial IO UART Controller 3") : Method (_PS0) { } : Method (_PS3) { } : } : : Device (UAR4) : { : Name (_ADR, 0x00110001) : Name (_DDN, "Serial IO UART Controller 4") : Method (_PS0) { } : Method (_PS3) { } : } : : Device (UAR5) : { : Name (_ADR, 0x00110002) : Name (_DDN, "Serial IO UART Controller 5") : Method (_PS0) { } : Method (_PS3) { } : } : : Device (UAR6) : { : Name (_ADR, 0x00110003) : Name (_DDN, "Serial IO UART Controller 6") : Method (_PS0) { } : Method (_PS3) { } : } :
Delete acccording to SOC_INTEL_UART_DEV_MAX:3 in Kconfig
Done
https://review.coreboot.org/c/coreboot/+/37781/3/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/smbus.asl:
https://review.coreboot.org/c/coreboot/+/37781/3/src/soc/intel/tigerlake/acp... PS3, Line 16: //
Use C sytle comments like other asl
Done