Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80629?usp=email )
(
6 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/xeon_sp: Put SRAT util macros into Xeon-SP ACPI header ......................................................................
soc/intel/xeon_sp: Put SRAT util macros into Xeon-SP ACPI header
Macros MAX_ACPI_MEMORY_AFFINITY_COUNT and MAX_SRAT_MEM_ENTRIES_PER_IMC are ACPI table specific, and could be used across Xeon-SP SoCs. This patch moves their definition from FSP header to Xeon-SP layer ACPI header.
TEST=intel/archercity CRB
Signed-off-by: Shuo Liu shuo.liu@intel.com Change-Id: I6c3a84b04a452bc8d4217947a7d12f050c94b56b Reviewed-on: https://review.coreboot.org/c/coreboot/+/80629 Reviewed-by: Patrick Rudolph patrick.rudolph@9elements.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/xeon_sp/include/soc/acpi.h M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h M src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_memmap.h M src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h 4 files changed, 3 insertions(+), 12 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/soc/intel/xeon_sp/include/soc/acpi.h b/src/soc/intel/xeon_sp/include/soc/acpi.h index f9c55ab..47c4090 100644 --- a/src/soc/intel/xeon_sp/include/soc/acpi.h +++ b/src/soc/intel/xeon_sp/include/soc/acpi.h @@ -5,6 +5,9 @@
#include <acpi/acpi.h>
+#define MAX_SRAT_MEM_ENTRIES_PER_IMC 8 +#define MAX_ACPI_MEMORY_AFFINITY_COUNT 256 + /** Select C-state map set in config cstate_states **/ diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h index eef8cc6..573b5c3 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h +++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h @@ -55,10 +55,6 @@ #define MAX_SAD_RULES 24 #define MAX_DRAM_CLUSTERS 1 #define MAX_IMC_PER_SOCKET 2 -#define MAX_SRAT_MEM_ENTRIES_PER_IMC 8 -#define MAX_ACPI_MEMORY_AFFINITY_COUNT ( \ - MAX_SOCKET * MAX_IMC_PER_SOCKET * MAX_SRAT_MEM_ENTRIES_PER_IMC \ - )
#define MEM_TYPE_RESERVED (1 << 8) #define MEM_ADDR_64MB_SHIFT_BITS 26 diff --git a/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_memmap.h index 0cf1f86..040414b 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_memmap.h +++ b/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_memmap.h @@ -40,11 +40,7 @@ }
#define MAX_IMC_PER_SOCKET MAX_IMC -#define MAX_SRAT_MEM_ENTRIES_PER_IMC 8 #define MAX_SMB_INSTANCE 2 -#define MAX_ACPI_MEMORY_AFFINITY_COUNT ( \ - MAX_SOCKET * MAX_IMC_PER_SOCKET * MAX_SRAT_MEM_ENTRIES_PER_IMC \ - ) #define AMT_MAX_NODE ((MAX_AMT)*(MAX_SOCKET)) // Max abstract memory target for all sockets
#endif // _HOB_MEMMAP_H_ diff --git a/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h index 3440ab7..c35b2f6 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h +++ b/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h @@ -41,10 +41,6 @@ #define MEMTYPE_VOLATILE_MASK (MEMTYPE_1LM_MASK | MEMTYPE_2LM_MASK)
#define MAX_IMC_PER_SOCKET 2 -#define MAX_SRAT_MEM_ENTRIES_PER_IMC 8 -#define MAX_ACPI_MEMORY_AFFINITY_COUNT ( \ - MAX_SOCKET * MAX_IMC_PER_SOCKET * MAX_SRAT_MEM_ENTRIES_PER_IMC \ - )
#define MEM_TYPE_RESERVED (1 << 8) #define MEM_ADDR_64MB_SHIFT_BITS 26