Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44196 )
Change subject: mrc_cache: Update mrc_cache data in romstage
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Patch Set 25:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44196/8//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/44196/8//COMMIT_MSG@16
PS8, Line 16: Updating spi driver Kconfig to set
: BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y if both
: BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y and BOOT_DEVICE_SPI_FLASH=y to bring
: the appropriate libraries into romstage.
There are some legacy Intel platforms which when executing out of memory mapped SPI flash did not allow writing back to it.
Does anybody know details about this? any reference? Was this with
Chromebooks? We have CONSOLE_SPI_FLASH today and I haven't heard of
any hardware issue with it on older platforms.
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