[coreboot-gerrit] [L] Change in coreboot[main]: mb/asrock: Add SPR 1S server board ASRock Rack SPC741D8-2L2T/BCM

[Fabian Meyer (Code Review)]

Attention is currently required from: Angel Pons, Fabian Meyer, Nico Huber, Paul Menzel.

Hello Nico Huber, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/82203?usp=email

to look at the new patch set (#10).

The following approvals got outdated and were removed:
Code-Review+1 by Nico Huber, Verified+1 by build bot (Jenkins)

Change subject: mb/asrock: Add SPR 1S server board ASRock Rack SPC741D8-2L2T/BCM
......................................................................

mb/asrock: Add SPR 1S server board ASRock Rack SPC741D8-2L2T/BCM

SPC741D8-2L2T/BCM is a Xeon SP 4th/5th gen (Eagle Stream) platform with:
- 1 SPR socket, 8 DDR5 DIMMs each
- 4x PCIe 5.0 / CXL 1.1 x16 slots
- 2x MCIO PCIe 5.0 x8 and 1 MCIO on PCH
- 2x M.2 PCH PCIe slots
- 2x 10 Gbit/s NIC and 2x 1 Gbit/s i210 NIC

It has an AST2600 BMC for remote management and most SuperIO functions
such as serial and an additional Nuvoton NCT6796D-E for others.

Working:
- Booting to Linux 6.8 using a mainline EDK2 payload
- All CPU cores of a 4th-gen Xeon SP are available at full speed
- All 8 memory DIMMs (KSM48R40BS8KMM-16HMR)
- All 4 PCIe slots
- On-board USB ports
- Video output via the AST2600 (on-board VGA)
- M.2 devices

Untested:
- 5th-gen Xeon SP processor
- TPM header

Not working:
- Serial port I/O, related to the AST2600 SuperIO not being located at
  the default address of 0x2E (it uses 0x4E instead).
- PC speaker (buzzer), for the same reason.
- M.2 SSDs only use PCIe Gen 2 speeds, however, they should be capable
  of Gen 3 speeds, which can be observed using the vendor firmware.

Change-Id: I84b170669873f1a168ea2b7e3be1d6071e811fa5
Signed-off-by: Fabian Meyer 
Co-authored-by: Yussuf Khalil 
---
A configs/builder/config.asrock.spc741d8
A src/mainboard/asrock/spc741d8/Kconfig
A src/mainboard/asrock/spc741d8/Kconfig.name
A src/mainboard/asrock/spc741d8/Makefile.mk
A src/mainboard/asrock/spc741d8/acpi/platform.asl
A src/mainboard/asrock/spc741d8/board.fmd
A src/mainboard/asrock/spc741d8/board_info.txt
A src/mainboard/asrock/spc741d8/bootblock.c
A src/mainboard/asrock/spc741d8/devicetree.cb
A src/mainboard/asrock/spc741d8/dsdt.asl
A src/mainboard/asrock/spc741d8/include/mainboard_iio.h
A src/mainboard/asrock/spc741d8/include/mainboard_ras.h
A src/mainboard/asrock/spc741d8/ramstage.c
A src/mainboard/asrock/spc741d8/romstage.c
A src/mainboard/asrock/spc741d8/util.c
15 files changed, 437 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/82203/10