[coreboot-gerrit] Change in coreboot[master]: mb/google/mancomb: Update Kconfig with needed options

[Martin Roth (Code Review)]

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52949 )

Change subject: mb/google/mancomb: Update Kconfig with needed options
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mb/google/mancomb: Update Kconfig with needed options

DISABLE_KEYBOARD_RESET_PIN - This pin goes to a test point and is not
used for the reset.
DRIVERS_UART_ACPI - Add the UART ACPI code
FW_CONFIG - Mancomb uses the firmware config interface
PSP_DISABLE_POSTCODES - The PSP is not yet initializing eSPI correctly
to send post codes to the EC, so disable them for now.

BUG=None
Test=Build

Signed-off-by: Martin Roth 
Change-Id: I39efcc8d1e0fb1e7ac0b0541a49db0ac0ee56481
---
M src/mainboard/google/mancomb/Kconfig
1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/52949/1

diff --git a/src/mainboard/google/mancomb/Kconfig b/src/mainboard/google/mancomb/Kconfig
index d114f0e..91ec169 100644
--- a/src/mainboard/google/mancomb/Kconfig
+++ b/src/mainboard/google/mancomb/Kconfig
@@ -9,20 +9,24 @@
    def_bool y
    select AMD_SOC_CONSOLE_UART
    select BOARD_ROMSIZE_KB_16384
+	select DISABLE_KEYBOARD_RESET_PIN
    select DISABLE_SPI_FLASH_ROM_SHARING
    select DRIVERS_I2C_GENERIC
    select DRIVERS_I2C_HID
+	select DRIVERS_UART_ACPI
    select EC_GOOGLE_CHROMEEC
    select EC_GOOGLE_CHROMEEC_BOARDID
    select EC_GOOGLE_CHROMEEC_ESPI
    select EC_GOOGLE_CHROMEEC_SKUID
    select ELOG
    select ELOG_GSMI
+	select FW_CONFIG
    select HAVE_ACPI_RESUME
    select HAVE_EM100_SUPPORT
    select MAINBOARD_HAS_CHROMEOS
    select MAINBOARD_HAS_I2C_TPM_CR50
    select MAINBOARD_HAS_TPM2
+	select PSP_DISABLE_POSTCODES
    select SOC_AMD_CEZANNE
    select SOC_AMD_COMMON_BLOCK_USE_ESPI