Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33774
Change subject: sb/amd/sb{700,800}: Cleanup index manipulations ......................................................................
sb/amd/sb{700,800}: Cleanup index manipulations
It looks like in days gone by that these switches were once parts of loops that incremented 'index' as they went along. However, we don't have any loops anymore, so remove the needless increments and streamline the rest of the assignments.
Change-Id: Iaabee984333c273af7810f9c11ed26bbb2a995d1 Signed-off-by: Jacob Garber jgarber1@ualberta.ca Found-by: scan-build 8.0.0 --- M src/southbridge/amd/sb700/sb700.c M src/southbridge/amd/sb800/sb800.c 2 files changed, 6 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/33774/1
diff --git a/src/southbridge/amd/sb700/sb700.c b/src/southbridge/amd/sb700/sb700.c index e3594fd..6f59179 100644 --- a/src/southbridge/amd/sb700/sb700.c +++ b/src/southbridge/amd/sb700/sb700.c @@ -171,7 +171,6 @@ index = 8; set_sm_enable_bits(sm_dev, 0xac, 1 << index, (dev->enabled ? 1 : 0) << index); - index += 32 * 3; break; case PCI_DEVFN(0x12, 0): case PCI_DEVFN(0x12, 1): @@ -179,7 +178,6 @@ index = dev->path.pci.devfn & 3; set_sm_enable_bits(sm_dev, 0x68, 1 << index, (dev->enabled ? 1 : 0) << index); - index += 32 * 2; break; case PCI_DEVFN(0x13, 0): case PCI_DEVFN(0x13, 1): @@ -187,34 +185,27 @@ index = (dev->path.pci.devfn & 3) + 4; set_sm_enable_bits(sm_dev, 0x68, 1 << index, (dev->enabled ? 1 : 0) << index); - index += 32 * 2; break; case PCI_DEVFN(0x14, 5): index = 7; set_sm_enable_bits(sm_dev, 0x68, 1 << index, (dev->enabled ? 1 : 0) << index); - index += 32 * 2; break; case PCI_DEVFN(0x14, 0): - index = 0; break; case PCI_DEVFN(0x14, 1): - index = 1; break; case PCI_DEVFN(0x14, 2): index = 3; set_pmio_enable_bits(sm_dev, 0x59, 1 << index, (dev->enabled ? 1 : 0) << index); - index += 32 * 4; break; case PCI_DEVFN(0x14, 3): index = 20; set_sm_enable_bits(sm_dev, 0x64, 1 << index, (dev->enabled ? 1 : 0) << index); - index += 32 * 1; break; case PCI_DEVFN(0x14, 4): - index = 4; break; default: printk(BIOS_DEBUG, "unknown dev: %s deviceid=%4x\n", dev_path(dev), diff --git a/src/southbridge/amd/sb800/sb800.c b/src/southbridge/amd/sb800/sb800.c index eda4d30..8935cff 100644 --- a/src/southbridge/amd/sb800/sb800.c +++ b/src/southbridge/amd/sb800/sb800.c @@ -295,9 +295,9 @@
switch (dev->path.pci.devfn - (devfn - (0x14 << 3))) { case PCI_DEVFN(0x11, 0): - index = 8; - set_pmio_enable_bits(0xDA, 1 << 0, - (dev->enabled ? 1 : 0) << 0); + index = 0; + set_pmio_enable_bits(0xDA, 1 << index, + (dev->enabled ? 1 : 0) << index); /* Set the device ID of SATA as 0x4390 to reduce the confusing. */ dword = pci_read_config32(dev, 0x40); dword |= 1 << 0; @@ -305,7 +305,6 @@ pci_write_config16(dev, 0x2, 0x4390); dword &= ~1; pci_write_config32(dev, 0x40, dword);//for (;;); - index += 32 * 3; break; case PCI_DEVFN(0x12, 0): case PCI_DEVFN(0x12, 2): @@ -318,15 +317,13 @@ index = (dev->path.pci.devfn & 0x3) / 2 + 2; set_pmio_enable_bits(0xEF, 1 << index, (dev->enabled ? 1 : 0) << index); - index += 32 * 2; break; case PCI_DEVFN(0x14, 0): - index = 0; break; case PCI_DEVFN(0x14, 1): - index = 1; - set_pmio_enable_bits(0xDA, 1 << 3, - (dev->enabled ? 0 : 1) << 3); + index = 3; + set_pmio_enable_bits(0xDA, 1 << index, + (dev->enabled ? 0 : 1) << index); break; case PCI_DEVFN(0x14, 2): index = 0; @@ -356,7 +353,6 @@ break; case PCI_DEVFN(0x15, 0): set_sb800_gpp(dev); - index = 4; break; case PCI_DEVFN(0x15, 1): case PCI_DEVFN(0x15, 2):