Attention is currently required from: Wonkyu Kim, Ravishankar Sarawadi, Angel Pons, Nick Vaccaro, Tim Wawrzynczak. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63471 )
Change subject: soc/intel/common: use gpmr api in common drivers ......................................................................
Patch Set 6: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63471/comment/366df176_1f2cd652 PS6, Line 9: Move GPMR(General Purpose Memory Range) APIs to gpmr driver from dmi.c : For this, 3 patches are used. : 1. Add GPMR common driver in IA common code(CB:63170) : 2. Migrate all DMI API usage to GPMR(CB:63471) : 3. Drop DMI driver (CB:63472) can you please write what this CL does, rather than the plan.
IMO, this CL adopts IA common GPMR driver over DMI as future SoC may provide other interface to configure GPMR rather being fixed with DMI.
File src/soc/intel/common/pch/lockdown/lockdown.c:
https://review.coreboot.org/c/coreboot/+/63471/comment/2002309e_63c055d0 PS6, Line 29: { : /* : * GCS reg of DMI : * : * When set, prevents GCS.BBS from being changed : * GCS.BBS: (Boot BIOS Strap) This field determines the destination : * of accesses to the BIOS memory range. : * Bits Description : * "0b": SPI : * "1b": LPC/eSPI : */ can we keep these comments ?