Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48564 )
Change subject: soc/amd/cezanne: add GPIO definitions ......................................................................
Patch Set 2:
(6 comments)
https://review.coreboot.org/c/coreboot/+/48564/2/src/soc/amd/cezanne/include... File src/soc/amd/cezanne/include/soc/gpio.h:
https://review.coreboot.org/c/coreboot/+/48564/2/src/soc/amd/cezanne/include... PS2, Line 3: AMD_PICASSO_GPIO_H change name
https://review.coreboot.org/c/coreboot/+/48564/2/src/soc/amd/cezanne/include... PS2, Line 116: #define GPIO_10_IOMUX_S0A3 1 nit, it looks like 2 is missing. PPR calls it reserved. could consider a comment for "reserved".
https://review.coreboot.org/c/coreboot/+/48564/2/src/soc/amd/cezanne/include... PS2, Line 140: #define GPIO_23_IOMUX_AC_PRES 0
'PRES' may be misspelled - perhaps 'PRESS'?
Same re. comment of reserved value 21
https://review.coreboot.org/c/coreboot/+/48564/2/src/soc/amd/cezanne/include... PS2, Line 161: #define same comment
https://review.coreboot.org/c/coreboot/+/48564/2/src/soc/amd/cezanne/include... PS2, Line 241: define Same comment
https://review.coreboot.org/c/coreboot/+/48564/2/src/soc/amd/cezanne/include... PS2, Line 266: IOMUX_UART0_INTR 2 same comment