[coreboot-gerrit] Change in coreboot[master]: soc/intel/canonlake: Enable UART2 in 32bit PCI mode

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21296 )

Change subject: soc/intel/canonlake: Enable UART2 in 32bit PCI mode
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Patch Set 3:

Build Successful

https://qa.coreboot.org/job/coreboot-checkpatch/14944/ : SUCCESS

https://qa.coreboot.org/job/coreboot-gerrit/59667/ : SUCCESS