[coreboot-gerrit] Change in coreboot[master]: soc/intel: Fix regression with hidden PCI devices

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34285 )

Change subject: soc/intel: Fix regression with hidden PCI devices
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Patch Set 5:
> Patch Set 5:
> > On SKL, KBL: Config write requests work on only one register, 32 bits, to unhide it.
>
> Sorry, I remembered this wrong. All config writes should work.

That is right. Writes should work.
> > Unhiding only works as long as the P2SB uses BOOT_SAI.
>
> I'm not sure about this any more, either. But at least there
> is something related that makes it impossible to unhide.

I think you are referring to endpoint mask locking: https://review.coreboot.org/cgit/coreboot.git/tree/src/soc/intel/common/bloc...