[coreboot-gerrit] Change in coreboot[master]: mb/google/skyrim: Add initial I2C configuration

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62160 )

Change subject: mb/google/skyrim: Add initial I2C configuration
......................................................................

mb/google/skyrim: Add initial I2C configuration

Add I2C peripheral reset configuration required during early init.
Enabled I2C generic and HID drivers.

BUG=b:214414677
TEST=Build

Signed-off-by: Jon Murphy 
Change-Id: I06e564cf6eca844101d70ff865f3074b45a55d55
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62160
Tested-by: build bot (Jenkins) 
Reviewed-by: Karthik Ramasubramanian 
---
M src/mainboard/google/skyrim/Kconfig
M src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
3 files changed, 36 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig
index 2a0ce65..558c667 100644
--- a/src/mainboard/google/skyrim/Kconfig
+++ b/src/mainboard/google/skyrim/Kconfig
@@ -18,6 +18,8 @@
    def_bool y
    select AMD_SOC_CONSOLE_UART
    select BOARD_ROMSIZE_KB_16384
+	select DRIVERS_I2C_GENERIC
+	select DRIVERS_I2C_HID
    select EC_GOOGLE_CHROMEEC
    select EC_GOOGLE_CHROMEEC_ESPI
    select ELOG
diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
index eaf998a..242f0fa 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
@@ -1,5 +1,8 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 chip soc/amd/sabrina
+	register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
+					GPIO_I2C2_SCL | GPIO_I2C3_SCL"
+
    device domain 0 on
    	device ref lpc_bridge on
    		chip ec/google/chromeec
@@ -84,4 +87,8 @@
    	end
    end # domain
    device ref uart_0 on end # UART0
+	device ref i2c_0 on end
+	device ref i2c_1 on end
+	device ref i2c_2 on end
+	device ref i2c_3 on end
 end	# chip soc/amd/sabrina
diff --git a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
index 4fb8baf..599478f 100644
--- a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
+++ b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
@@ -6,4 +6,31 @@
 chip soc/amd/sabrina
    device domain 0 on
    end # domain
+
+	# I2C Config
+	#+-------------------+----------------------------+
+	#| Field             |  Value                     |
+	#+-------------------+----------------------------+
+	#| I2C0              | Trackpad                   |
+	#| I2C1              | Touchscreen                |
+	#| I2C2              | Speaker, Codec, P-SAR, USB |
+	#| I2C3              | D2 TPM                     |
+	#+-------------------+----------------------------+
+	register "i2c[0]" = "{
+		.speed = I2C_SPEED_FAST,
+	}"
+
+	register "i2c[1]" = "{
+		.speed = I2C_SPEED_FAST,
+	}"
+
+	register "i2c[2]" = "{
+		.speed = I2C_SPEED_FAST,
+	}"
+
+	register "i2c[3]" = "{
+		.speed = I2C_SPEED_FAST,
+		.early_init = true,
+	}"
+
 end	# chip soc/amd/sabrina

20 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.