[coreboot-gerrit] Change in coreboot[master]: mb/intel/kblrvp: Always use `CHIPSET_LOCKDOWN_COREBOOT`

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52095 )

Change subject: mb/intel/kblrvp: Always use `CHIPSET_LOCKDOWN_COREBOOT`
......................................................................

mb/intel/kblrvp: Always use `CHIPSET_LOCKDOWN_COREBOOT`

Two of the variants used `CHIPSET_LOCKDOWN_COREBOOT`, whereas the other
half used `CHIPSET_LOCKDOWN_FSP` by omission. Since this is most likely
not done on purpose, choose `CHIPSET_LOCKDOWN_COREBOOT` on all variants
for consistency.

Now, all Skylake mainboards use `CHIPSET_LOCKDOWN_COREBOOT`.

Change-Id: I2db1456d1734b2c0a6019002c211f608bcdf4a19
Signed-off-by: Angel Pons 
---
M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
M src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
4 files changed, 5 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/52095/1

diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
index e17c8b7..147a27a 100644
--- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
@@ -110,6 +110,11 @@
    # Send an extra VR mailbox command for the PS4 exit issue
    register "SendVrMbxCmd" = "2"

+	# Lock Down
+	register "common_soc_config" = "{
+		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+	}"
+
    device cpu_cluster 0 on
    	device lapic 0 on end
    end
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
index ad7c4ab..bc4a677 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
@@ -105,11 +105,6 @@
    	.tdp_pl2_override = 60,
    }"

-	# Lock Down
-	register "common_soc_config" = "{
-	.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
-	}"
-
    device domain 0 on
    	device pci 04.0 off end # SA thermal subsystem
    	device pci 17.0 on  end # SATA
diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
index 397155b..b1d2917 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
@@ -110,11 +110,6 @@
    	[PchSerialIoIndexUart2] = PchSerialIoSkipInit, \
    }"

-	# Lock Down
-	register "common_soc_config" = "{
-		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
-	}"
-
    device domain 0 on
    	device pci 05.0 on  end # SA IMGU
    	device pci 14.3 on  end # Camera
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
index 20c147c..e7e430d 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
@@ -152,11 +152,6 @@
    # Use default SD card detect GPIO configuration
    register "sdcard_cd_gpio" = "GPP_G5"

-	# Lock Down
-	register "common_soc_config" = "{
-		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
-	}"
-
    device cpu_cluster 0 on
    	device lapic 0 on end
    end