[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Change code to accommodate merlinfalcon SOC

[Marshall Dawson (Code Review)]

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33624 )

Change subject: soc/amd/stoneyridge: Change code to accommodate merlinfalcon SOC
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Patch Set 9:

(1 comment)

https://review.coreboot.org/c/coreboot/+/33624/9/src/soc/amd/stoneyridge/chi... 
File src/soc/amd/stoneyridge/chip.h:

https://review.coreboot.org/c/coreboot/+/33624/9/src/soc/amd/stoneyridge/chi... 
PS9, Line 29: MAX_DIMMS_PER_CH
> I got it from Marc's code. I have no documentation to say either way. […]

I can assure you it has nothing to do with the number of cores.  Please see my original statement above and investigate where Marc may have gotten it.