Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40247 )
Change subject: soc/amd/common: Determine # of I2C controllers at runtime
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Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40247/2/src/soc/amd/picasso/i2c.c
File src/soc/amd/picasso/i2c.c:
https://review.coreboot.org/c/coreboot/+/40247/2/src/soc/amd/picasso/i2c.c@2...
PS2, Line 23: APU_I2C0_BASE
So I think we can drop this CL. I2C0 and I2C1 are accessible via the x86, but the interrupts were never routed to the x86 domain. So the device is essentially useless.
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