Evgeny Zinoviev has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Documentation: Add GM45 ThinkPads common page
- Add a common page about X200/T400/T500 ThinkPads. - Describe how to remove ME on these models. - Describe default flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/xx00_series.md 2 files changed, 115 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/1
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index ce30ee2..3b5903b 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -77,6 +77,7 @@
### GM45 series
+- [X200 / T400 / T500 common](lenovo/xx00_series.md) - [X301](lenovo/x301.md)
### Sandy Bridge series diff --git a/Documentation/mainboard/lenovo/xx00_series.md b/Documentation/mainboard/lenovo/xx00_series.md new file mode 100644 index 0000000..3ac7c87 --- /dev/null +++ b/Documentation/mainboard/lenovo/xx00_series.md @@ -0,0 +1,114 @@ +# Lenovo X200 / T400 / T500 common + +These models can have 8 MB or 4 MB flash chip installed. You can identify the +chip in your machine through flashrom: +``` +flashrom -p internal +``` + +## Installing without ME firmware + +On GM45 machines it's possible to disable and remove ME by modifying the flash +descriptor. This also make it possible to use the flash region the ME used for +`bios` region, allowing for much larger payloads. + +First of all create a backup of your ROM with an external programmer: +``` +flashrom -p YOUR_PROGRAMMER -r backup.rom +``` + +Then extract FD modules to a separate files. Your will need +`flashregion_3_gbe.bin` later. +``` +ifdtool -x backup.rom +``` + +There is a tool to generate modified flash descriptor called **bincfg**. Go to +`util/bincfg` and build it: +``` +cd util/bincfg +make +``` + +If your flash is 4 MB, edit the `ifd-x200.set` file as shown: + +```diff +diff --git a/util/blobtool/ifd-x200.set b/util/blobtool/ifd-x200.set +--- a/util/blobtool/ifd-x200.set ++++ b/util/blobtool/ifd-x200.set +@@ -35,7 +35,7 @@ + "flmap2_msl" = 0x1, + "flmap2_reserved" = 0x0, + +- "flcomp_density1" = 0x4, ++ "flcomp_density1" = 0x3, + "flcomp_density2" = 0x2, + "flcomp_reserved0" = 0x0, + "flcomp_reserved1" = 0x0, +@@ -56,7 +56,7 @@ + "flreg0_reserved1" = 0x0, + "flreg1_base" = 0x3, + "flreg1_reserved0" = 0x0, +- "flreg1_limit" = 0x7ff, ++ "flreg1_limit" = 0x3ff, + "flreg1_reserved1" = 0x0, + "flreg2_base" = 0x1fff, + "flreg2_reserved0" = 0x0, +``` + +Create the flash descriptor: +``` +./bincfg ifd-x200.spec ifd-x200.set ifd.bin +``` + +Now configure coreboot. You need to select correct chip size and specify paths +to flash descriptor and gbe dump. +``` +Mainboard ---> + ROM chip size (8192 KB (8 MB)) # According to your chip + (0x7fd000) Size of CBFS filesystem in ROM # or 0x3fd000 for 4 MB chip + +Chipset ---> + [*] Add Intel descriptor.bin file + (/path/to/util/bincfg/ifd.bin) Path and filename of the descriptor.bin file + + [*] Add gigabit ethernet configuration + (/path/to/flashregion_3_gbe.bin) Path to gigabit ethernet configuration +``` + +Then build coreboot and flash whole `build/coreboot.rom` to the chip. + +## Installing with ME firmware + +To install coreboot and keep ME, you don't need to do anything special. Just +flash only `bios` and don't touch other regions: +``` +flashrom -p YOUR_PROGRAMMER -w coreboot.rom --ifd -i bios +``` + +## Flash layout + +The flash layout of the OEM firmware on 8 MB chips is as follows: +``` +00000000:00000fff descriptor +00001000:005f5fff me +005f6000:005f7fff gbe +005f8000:005fffff platform +00600000:007fffff bios +00690000:006affff ec +007e0000:007fffff bootblock +``` + +On 4 MB chips: +``` +00000000:00000fff descriptor +00001000:001f5fff me +001f6000:001f7fff gbe +001f8000:001fffff platform +00200000:003fffff bios +00290000:002affff ec +003e0000:003fffff bootblock +``` + +The `ec` region is not where EC firmware is stored. It's where EC firmware +updates are stored for PhoenixBIOS to write them to EC once.