[coreboot-gerrit] Change in coreboot[master]: vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2197_00

[Ronak Kanabar (Code Review)]

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Subrata Banik, Sridhar Siricilla, Balaji Manigandan, Tim Wawrzynczak, Srinidhi N Kaushik, Patrick Rudolph.
Hello build bot (Jenkins), Furquan Shaikh, Maulik V Vaghela, Subrata Banik, Sridhar Siricilla, Balaji Manigandan, Tim Wawrzynczak, Srinidhi N Kaushik, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/55094

to look at the new patch set (#2).

Change subject: vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2197_00
......................................................................

vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2197_00

The headers added are generated as per FSP v2197_00.
Previous FSP version was v2162_00.
Changes Include:
- Add IbeccProtectedRangeEnable, IbeccProtectedRangeBase and
  IbeccProtectedRangeMask in FspmUpd.h
- Adjust Reserved UPD Offset in FspmUpd.h
- Few UPDs description update in FspmUpd.h and FspsUpd.h

BUG=b:189731004
BRANCH=None
TEST=Build and boot brya

Change-Id: Ice44dfbd41e8eca4f171b76e7a3dcdf133a516fd
Cq-Depend: TBD
Signed-off-by: Ronak Kanabar 
---
M src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
M src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
2 files changed, 72 insertions(+), 60 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/55094/2