Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/27176
Change subject: soc/intel/cannonlake: Remove DMA support for PTT ......................................................................
soc/intel/cannonlake: Remove DMA support for PTT
Alternative buffer communication support for PTT is no longer needed for CNL onwards and coreboot no need to reserve additional 4KiB memory for PTT support.
Change-Id: I11993cef77fd5e879eedabc1ed344f91f8257c90 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/cannonlake/include/soc/iomap.h M src/soc/intel/cannonlake/memmap.c 2 files changed, 0 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/27176/1
diff --git a/src/soc/intel/cannonlake/include/soc/iomap.h b/src/soc/intel/cannonlake/include/soc/iomap.h index 2a3608c..75f11c0 100644 --- a/src/soc/intel/cannonlake/include/soc/iomap.h +++ b/src/soc/intel/cannonlake/include/soc/iomap.h @@ -65,10 +65,6 @@
#define HECI1_BASE_ADDRESS 0xfeda2000
-/* PTT registers */ -#define PTT_TXT_BASE_ADDRESS 0xfed30800 -#define PTT_PRESENT 0x00070000 - #define VTD_BASE_ADDRESS 0xFED90000 #define VTD_BASE_SIZE 0x00004000 /* diff --git a/src/soc/intel/cannonlake/memmap.c b/src/soc/intel/cannonlake/memmap.c index 108a1b0..64e07be 100644 --- a/src/soc/intel/cannonlake/memmap.c +++ b/src/soc/intel/cannonlake/memmap.c @@ -83,22 +83,6 @@ return 0; }
-static bool is_ptt_enable(void) -{ - if ((read32((void *)PTT_TXT_BASE_ADDRESS) & PTT_PRESENT) == - PTT_PRESENT) - return true; - - return false; -} - -/* Calculate PTT size */ -static size_t get_ptt_size(void) -{ - /* Allocate 4KB for PTT if enabled */ - return is_ptt_enable() ? 4*KiB : 0; -} - /* Calculate ME Stolen size */ static size_t get_imr_size(void) { @@ -192,9 +176,6 @@ /* Get Tracehub size */ reserve_mem_base -= get_imr_size();
- /* Get PTT size */ - reserve_mem_base -= get_ptt_size(); - /* Traditional Area Size */ reserve_mem_size = dram_base - reserve_mem_base;