Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/libgfxinit/+/27059 )
Change subject: gma: Introduce Generation type ......................................................................
gma: Introduce Generation type
It's the subset of `CPU_Type` that we have different compilation units for. Also use it in the `Config` wherever we can decide something purely on the `Generation` (i.e. don't mix `Gen` and `CPU` in expressions).
Change-Id: I5061021a80cd75ee3d7996ca343e6388b22bf341 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/27059 Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M common/Makefile.inc M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-config_helpers.adb M common/hw-gfx-gma.adb M common/hw-gfx-gma.ads M configs/broadwell M configs/broadwell_ult M configs/broxton M configs/g45 M configs/haswell M configs/haswell_ult M configs/ironlake M configs/ivybridge_edp M configs/ivybridge_lvds M configs/sandybridge M configs/skylake M configs/skylake_ult 17 files changed, 82 insertions(+), 61 deletions(-)
Approvals: Nico Huber: Verified Arthur Heymans: Looks good to me, approved
diff --git a/common/Makefile.inc b/common/Makefile.inc index 8d6634e..410eeba 100644 --- a/common/Makefile.inc +++ b/common/Makefile.inc @@ -45,6 +45,7 @@ gfxinit-y += hw-gfx-framebuffer_filler.adb gfxinit-y += hw-gfx-framebuffer_filler.ads
+CONFIG_GFX_GMA_GENERATION := $(call strip_quotes,$(CONFIG_GFX_GMA_GENERATION)) CONFIG_GFX_GMA_CPU := $(call strip_quotes,$(CONFIG_GFX_GMA_CPU)) CONFIG_GFX_GMA_CPU_VARIANT := $(call strip_quotes,$(CONFIG_GFX_GMA_CPU_VARIANT)) CONFIG_GFX_GMA_INTERNAL_PORT := $(call strip_quotes,$(CONFIG_GFX_GMA_INTERNAL_PORT)) @@ -54,7 +55,8 @@
$(hw-gfx-gma-config-ads): $(dir)/hw-gfx-gma-config.ads.template $(cnf) printf " GENERATE $(patsubst /%,%,$(subst $(obj)/,,$@))\n" - sed -e's/<<CPU>>/$(CONFIG_GFX_GMA_CPU)/' \ + sed -e's/<<GEN>>/$(CONFIG_GFX_GMA_GENERATION)/' \ + -e's/<<CPU>>/$(CONFIG_GFX_GMA_CPU)/' \ -e's/<<CPU_VARIANT>>/$(CONFIG_GFX_GMA_CPU_VARIANT)/' \ -e's/<<INTERNAL_PORT>>/$(CONFIG_GFX_GMA_INTERNAL_PORT)/' \ -e's/<<ANALOG_I2C_PORT>>/$(CONFIG_GFX_GMA_ANALOG_I2C_PORT)/' \ diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index e34e89d..5703926 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -17,6 +17,8 @@ Initializes => (Valid_Port, Raw_Clock) is
+ Gen : constant Generation := <<GEN>>; + CPU : constant CPU_Type := <<CPU>>;
CPU_Var : constant CPU_Variant := <<CPU_VARIANT>>; @@ -35,6 +37,20 @@
----------------------------------------------------------------------------
+ Gen_G45 : constant Boolean := Gen = G45; + Gen_Ironlake : constant Boolean := Gen = Ironlake; + Gen_Haswell : constant Boolean := Gen = Haswell; + Gen_Broxton : constant Boolean := Gen = Broxton; + Gen_Skylake : constant Boolean := Gen = Skylake; + + Up_To_Ironlake : constant Boolean := Gen <= Ironlake; + Ironlake_On : constant Boolean := Gen >= Ironlake; + Haswell_On : constant Boolean := Gen >= Haswell; + Broxton_On : constant Boolean := Gen >= Broxton; + Skylake_On : constant Boolean := Gen >= Skylake; + + ---------------------------------------------------------------------------- + Have_HDMI_Buf_Override : constant Boolean := DDI_HDMI_Buffer_Translation >= 0; Default_MMIO_Base_Set : constant Boolean := Default_MMIO_Base /= 0;
@@ -42,50 +58,49 @@ Internal_Is_LVDS : constant Boolean := Internal_Display = LVDS; Internal_Is_EDP : constant Boolean := Internal_Display = DP; Have_DVI_I : constant Boolean := Analog_I2C_Port /= PCH_DAC; - Has_Presence_Straps : constant Boolean := CPU /= Broxton; + Has_Presence_Straps : constant Boolean := not Gen_Broxton; Is_ULT : constant Boolean := CPU_Var = ULT;
----- CPU pipe: -------- Has_Tertiary_Pipe : constant Boolean := CPU >= Ivybridge; - Disable_Trickle_Feed : constant Boolean := not - (CPU in Haswell .. Broadwell); + Disable_Trickle_Feed : constant Boolean := not Gen_Haswell; Pipe_Enabled_Workaround : constant Boolean := CPU = Broadwell; - Has_EDP_Transcoder : constant Boolean := CPU >= Haswell; + Has_EDP_Transcoder : constant Boolean := Haswell_On; Use_PDW_For_EDP_Scaling : constant Boolean := CPU = Haswell; - Has_Pipe_DDI_Func : constant Boolean := CPU >= Haswell; - Has_Trans_Clk_Sel : constant Boolean := CPU >= Haswell; - Has_Pipe_MSA_Misc : constant Boolean := CPU >= Haswell; + Has_Pipe_DDI_Func : constant Boolean := Haswell_On; + Has_Trans_Clk_Sel : constant Boolean := Haswell_On; + Has_Pipe_MSA_Misc : constant Boolean := Haswell_On; Has_Pipeconf_Misc : constant Boolean := CPU >= Broadwell; Has_Pipeconf_BPC : constant Boolean := CPU /= Haswell; - Has_Plane_Control : constant Boolean := CPU >= Broxton; - Has_DSP_Linoff : constant Boolean := CPU <= Ivybridge; + Has_Plane_Control : constant Boolean := Broxton_On; + Has_DSP_Linoff : constant Boolean := Up_To_Ironlake; Has_PF_Pipe_Select : constant Boolean := CPU in Ivybridge .. Haswell; Has_Cursor_FBC_Control : constant Boolean := CPU >= Ivybridge; VGA_Plane_Workaround : constant Boolean := CPU = Ivybridge; - Has_GMCH_DP_Transcoder : constant Boolean := CPU = G45; - Has_GMCH_VGACNTRL : constant Boolean := CPU = G45; - Has_GMCH_PFIT_CONTROL : constant Boolean := CPU = G45; + Has_GMCH_DP_Transcoder : constant Boolean := Gen_G45; + Has_GMCH_VGACNTRL : constant Boolean := Gen_G45; + Has_GMCH_PFIT_CONTROL : constant Boolean := Gen_G45;
----- Panel power: ----- - Has_PP_Write_Protection : constant Boolean := CPU <= Ivybridge; - Has_PP_Port_Select : constant Boolean := CPU <= Ivybridge; - Use_PP_VDD_Override : constant Boolean := CPU <= Ivybridge; - Has_PCH_Panel_Power : constant Boolean := CPU >= Ironlake; + Has_PP_Write_Protection : constant Boolean := Up_To_Ironlake; + Has_PP_Port_Select : constant Boolean := Up_To_Ironlake; + Use_PP_VDD_Override : constant Boolean := Up_To_Ironlake; + Has_PCH_Panel_Power : constant Boolean := Ironlake_On;
----- PCH/FDI: --------- - Has_PCH : constant Boolean := CPU /= Broxton and CPU /= G45; + Has_PCH : constant Boolean := not Gen_Broxton and not Gen_G45; Has_PCH_DAC : constant Boolean := CPU in Ironlake .. Ivybridge or (CPU in Haswell .. Broadwell and not Is_ULT);
- Has_PCH_Aux_Channels : constant Boolean := CPU in Ironlake .. Broadwell; + Has_PCH_Aux_Channels : constant Boolean := Gen_Ironlake or Gen_Haswell;
- VGA_Has_Sync_Disable : constant Boolean := CPU <= Ivybridge; + VGA_Has_Sync_Disable : constant Boolean := Up_To_Ironlake;
Has_Trans_Timing_Ovrrde : constant Boolean := CPU >= Sandybridge;
- Has_DPLL_SEL : constant Boolean := CPU in Ironlake .. Ivybridge; - Has_FDI_BPC : constant Boolean := CPU in Ironlake .. Ivybridge; + Has_DPLL_SEL : constant Boolean := Gen_Ironlake; + Has_FDI_BPC : constant Boolean := Gen_Ironlake; Has_FDI_Composite_Sel : constant Boolean := CPU = Ivybridge; Has_New_FDI_Sink : constant Boolean := CPU >= Sandybridge; Has_New_FDI_Source : constant Boolean := CPU >= Ivybridge; @@ -93,19 +108,19 @@ Sandybridge .. Ivybridge; Has_FDI_C : constant Boolean := CPU = Ivybridge;
- Has_FDI_RX_Power_Down : constant Boolean := CPU in Haswell .. Broadwell; + Has_FDI_RX_Power_Down : constant Boolean := Gen_Haswell;
- Has_GMCH_RawClk : constant Boolean := CPU = G45; + Has_GMCH_RawClk : constant Boolean := Gen_G45;
----- DDI: ------------- - End_EDP_Training_Late : constant Boolean := CPU in Haswell .. Broadwell; - Has_Per_DDI_Clock_Sel : constant Boolean := CPU in Haswell .. Broadwell; - Has_HOTPLUG_CTL : constant Boolean := CPU in Haswell .. Broadwell; + End_EDP_Training_Late : constant Boolean := Gen_Haswell; + Has_Per_DDI_Clock_Sel : constant Boolean := Gen_Haswell; + Has_HOTPLUG_CTL : constant Boolean := Gen_Haswell; Has_SHOTPLUG_CTL_A : constant Boolean := (CPU in Haswell .. Broadwell and Is_ULT) or CPU >= Skylake;
- Has_DDI_PHYs : constant Boolean := CPU = Broxton; + Has_DDI_PHYs : constant Boolean := Gen_Broxton;
Has_DDI_D : constant Boolean := CPU >= Haswell and not Is_ULT and @@ -113,17 +128,17 @@ Has_DDI_E : constant Boolean := -- might be disabled by x4 eDP Has_DDI_D;
- Has_DDI_Buffer_Trans : constant Boolean := CPU >= Haswell and - CPU /= Broxton; - Has_Low_Voltage_Swing : constant Boolean := CPU >= Broxton; - Has_Iboost_Config : constant Boolean := CPU >= Skylake; + Has_DDI_Buffer_Trans : constant Boolean := Haswell_On and + not Gen_Broxton; + Has_Low_Voltage_Swing : constant Boolean := Broxton_On; + Has_Iboost_Config : constant Boolean := Skylake_On;
Need_DP_Aux_Mutex : constant Boolean := False; -- Skylake & (PSR | GTC)
----- GMBUS: ----------- - Ungate_GMBUS_Unit_Level : constant Boolean := CPU >= Skylake; - GMBUS_Alternative_Pins : constant Boolean := CPU = Broxton; - Has_PCH_GMBUS : constant Boolean := CPU >= Ironlake; + Ungate_GMBUS_Unit_Level : constant Boolean := Skylake_On; + GMBUS_Alternative_Pins : constant Boolean := Gen_Broxton; + Has_PCH_GMBUS : constant Boolean := Ironlake_On;
----- Power: ----------- Has_IPS : constant Boolean := (CPU = Haswell and Is_ULT) or @@ -151,24 +166,15 @@
type FDI_Per_Port is array (Port_Type) of Boolean; Is_FDI_Port : constant FDI_Per_Port := - (case CPU is - when Ironlake .. Ivybridge => FDI_Per_Port' - (Internal => Internal_Is_LVDS, - others => True), - when Haswell .. Broadwell => FDI_Per_Port' - (Analog => Has_PCH_DAC, - others => False), - when others => FDI_Per_Port' - (others => False)); + (Disabled => False, + Internal => Gen_Ironlake and Internal_Is_LVDS, + DP1 .. HDMI3 => Gen_Ironlake, + Analog => Has_PCH_DAC);
type FDI_Lanes_Per_Port is array (GPU_Port) of DP_Lane_Count; FDI_Lane_Count : constant FDI_Lanes_Per_Port := (DIGI_D => DP_Lane_Count_2, - others => - (if CPU in Ironlake .. Ivybridge then - DP_Lane_Count_4 - else - DP_Lane_Count_2)); + others => (if Gen_Ironlake then DP_Lane_Count_4 else DP_Lane_Count_2));
FDI_Training : constant FDI_Training_Type := (case CPU is @@ -236,8 +242,8 @@ Tertiary => 4096));
-- Maximum X position of hardware cursors - Maximum_Cursor_X : constant := (case CPU is - when G45 .. Ivybridge => 4095, + Maximum_Cursor_X : constant := (case Gen is + when G45 .. Ironlake => 4095, when Haswell .. Skylake => 8191);
Maximum_Cursor_Y : constant := 4095; @@ -246,7 +252,7 @@
-- FIXME: Unknown for Broxton, Linux' i915 contains a fixme too :-D HDMI_Max_Clock_24bpp : constant Frequency_Type := - (if CPU >= Haswell then 300_000_000 else 225_000_000); + (if Haswell_On then 300_000_000 else 225_000_000);
----------------------------------------------------------------------------
diff --git a/common/hw-gfx-gma-config_helpers.adb b/common/hw-gfx-gma-config_helpers.adb index 57163a6..c95bebc 100644 --- a/common/hw-gfx-gma-config_helpers.adb +++ b/common/hw-gfx-gma-config_helpers.adb @@ -29,24 +29,23 @@ is begin return - (case Config.CPU is - when G45 => + (case Config.Gen is + when G45 => -- everything on GMCH (case Port is when Internal => LVDS, when HDMI1 | DP1 => DIGI_B, when HDMI2 | DP2 => DIGI_C, when HDMI3 | DP3 => DIGI_D, when Analog => VGA), - when Ironlake .. Ivybridge => -- everything but eDP through FDI/PCH + when Ironlake => -- everything but eDP through FDI/PCH (if Config.Internal_Is_EDP and then Port = Internal then DIGI_A else - (case Pipe is - -- FDIs are fixed to the CPU pipe + (case Pipe is -- FDIs are fixed to the CPU pipe when Primary => DIGI_B, when Secondary => DIGI_C, when Tertiary => DIGI_D)), - when Haswell .. Skylake => -- everything but VGA directly on CPU + when others => -- everything but VGA directly on CPU (case Port is when Internal => DIGI_A, -- LVDS not available when HDMI1 | DP1 => DIGI_B, diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb index abd19b1..abb9ffc 100644 --- a/common/hw-gfx-gma.adb +++ b/common/hw-gfx-gma.adb @@ -398,13 +398,13 @@ is Audio_VID_DID : Word32; begin - case Config.CPU is + case Config.Gen is when G45 => Registers.Read (Registers.G4X_AUD_VID_DID, Audio_VID_DID); + when Ironlake => + Registers.Read (Registers.PCH_AUD_VID_DID, Audio_VID_DID); when Haswell .. Skylake => Registers.Read (Registers.AUD_VID_DID, Audio_VID_DID); - when Ironlake .. Ivybridge => - Registers.Read (Registers.PCH_AUD_VID_DID, Audio_VID_DID); end case; Success := (case Config.CPU is diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads index dcb3975..db7f2bf 100644 --- a/common/hw-gfx-gma.ads +++ b/common/hw-gfx-gma.ads @@ -35,6 +35,8 @@ subtype GTT_Range is Natural range 0 .. 16#8_0000# - 1; GTT_Rotation_Offset : constant GTT_Range := GTT_Range'Last / 2 + 1;
+ type Generation is (G45, Ironlake, Haswell, Broxton, Skylake); + type CPU_Type is (G45, Ironlake, diff --git a/configs/broadwell b/configs/broadwell index a8aa58a..06a6c2a 100644 --- a/configs/broadwell +++ b/configs/broadwell @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Haswell CONFIG_GFX_GMA_CPU = Broadwell CONFIG_GFX_GMA_CPU_VARIANT = Normal CONFIG_GFX_GMA_INTERNAL_PORT = DP diff --git a/configs/broadwell_ult b/configs/broadwell_ult index 3507a41..105992a 100644 --- a/configs/broadwell_ult +++ b/configs/broadwell_ult @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Haswell CONFIG_GFX_GMA_CPU = Broadwell CONFIG_GFX_GMA_CPU_VARIANT = ULT CONFIG_GFX_GMA_INTERNAL_PORT = DP diff --git a/configs/broxton b/configs/broxton index b5f1f9a..35db833 100644 --- a/configs/broxton +++ b/configs/broxton @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Broxton CONFIG_GFX_GMA_CPU = Broxton CONFIG_GFX_GMA_CPU_VARIANT = Normal # N/A CONFIG_GFX_GMA_INTERNAL_PORT = DP diff --git a/configs/g45 b/configs/g45 index 6b54563..ef97850 100644 --- a/configs/g45 +++ b/configs/g45 @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = G45 CONFIG_GFX_GMA_CPU = G45 CONFIG_GFX_GMA_CPU_VARIANT = Normal CONFIG_GFX_GMA_INTERNAL_PORT = LVDS diff --git a/configs/haswell b/configs/haswell index d28168c..8c025da 100644 --- a/configs/haswell +++ b/configs/haswell @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Haswell CONFIG_GFX_GMA_CPU = Haswell CONFIG_GFX_GMA_CPU_VARIANT = Normal CONFIG_GFX_GMA_INTERNAL_PORT = DP diff --git a/configs/haswell_ult b/configs/haswell_ult index 3ba633a..9559042 100644 --- a/configs/haswell_ult +++ b/configs/haswell_ult @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Haswell CONFIG_GFX_GMA_CPU = Haswell CONFIG_GFX_GMA_CPU_VARIANT = ULT CONFIG_GFX_GMA_INTERNAL_PORT = DP diff --git a/configs/ironlake b/configs/ironlake index d29d71c..2c26a79 100644 --- a/configs/ironlake +++ b/configs/ironlake @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Ironlake CONFIG_GFX_GMA_CPU = Ironlake CONFIG_GFX_GMA_CPU_VARIANT = Normal CONFIG_GFX_GMA_INTERNAL_PORT = LVDS diff --git a/configs/ivybridge_edp b/configs/ivybridge_edp index 257b59c..6ce8543 100644 --- a/configs/ivybridge_edp +++ b/configs/ivybridge_edp @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Ironlake CONFIG_GFX_GMA_CPU = Ivybridge CONFIG_GFX_GMA_CPU_VARIANT = Normal CONFIG_GFX_GMA_INTERNAL_PORT = DP diff --git a/configs/ivybridge_lvds b/configs/ivybridge_lvds index 4327652..31813f9 100644 --- a/configs/ivybridge_lvds +++ b/configs/ivybridge_lvds @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Ironlake CONFIG_GFX_GMA_CPU = Ivybridge CONFIG_GFX_GMA_CPU_VARIANT = Normal CONFIG_GFX_GMA_INTERNAL_PORT = LVDS diff --git a/configs/sandybridge b/configs/sandybridge index 2bdce64..5cc15cd 100644 --- a/configs/sandybridge +++ b/configs/sandybridge @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Ironlake CONFIG_GFX_GMA_CPU = Sandybridge CONFIG_GFX_GMA_CPU_VARIANT = Normal CONFIG_GFX_GMA_INTERNAL_PORT = LVDS diff --git a/configs/skylake b/configs/skylake index 12ca514..26c9896 100644 --- a/configs/skylake +++ b/configs/skylake @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Skylake CONFIG_GFX_GMA_CPU = Skylake CONFIG_GFX_GMA_CPU_VARIANT = Normal CONFIG_GFX_GMA_INTERNAL_PORT = DP diff --git a/configs/skylake_ult b/configs/skylake_ult index 94d1161..c683251 100644 --- a/configs/skylake_ult +++ b/configs/skylake_ult @@ -1,3 +1,4 @@ +CONFIG_GFX_GMA_GENERATION = Skylake CONFIG_GFX_GMA_CPU = Skylake CONFIG_GFX_GMA_CPU_VARIANT = ULT CONFIG_GFX_GMA_INTERNAL_PORT = DP