[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Speed up postcar loading using intermediate cac...

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34791 )

Change subject: soc/intel/cannonlake: Speed up postcar loading using intermediate caching
......................................................................

Patch Set 2: Code-Review+1

(4 comments)

Nice.

https://review.coreboot.org/c/coreboot/+/34791/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/34791/2//COMMIT_MSG@11 
PS2, Line 11: car
CAR

https://review.coreboot.org/c/coreboot/+/34791/2//COMMIT_MSG@14 
PS2, Line 14: CL.
On what board?

https://review.coreboot.org/c/coreboot/+/34791/2/src/soc/intel/cannonlake/ro... 
File src/soc/intel/cannonlake/romstage/romstage.c:

https://review.coreboot.org/c/coreboot/+/34791/2/src/soc/intel/cannonlake/ro... 
PS2, Line 133: car
CAR

https://review.coreboot.org/c/coreboot/+/34791/2/src/soc/intel/cannonlake/ro... 
PS2, Line 177: enabling
enable