Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/27369
Change subject: soc/intel/skylake: [WIP] Add support for updating microcode in the field ......................................................................
soc/intel/skylake: [WIP] Add support for updating microcode in the field
Change-Id: Iab6ba36a2eb587f331fe522c778e2c430c8eb655 Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com --- A src/soc/intel/skylake/include/soc/ucode_update.h M src/soc/intel/skylake/romstage/Makefile.inc A src/soc/intel/skylake/romstage/ucode_update.c 3 files changed, 287 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/27369/1
diff --git a/src/soc/intel/skylake/include/soc/ucode_update.h b/src/soc/intel/skylake/include/soc/ucode_update.h new file mode 100644 index 0000000..4a8e67b --- /dev/null +++ b/src/soc/intel/skylake/include/soc/ucode_update.h @@ -0,0 +1 @@ +int check_and_update_ucode(void); diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc index 8bfbfea..aa70488 100644 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ b/src/soc/intel/skylake/romstage/Makefile.inc @@ -2,3 +2,4 @@ romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += romstage.c romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage_fsp20.c romstage-y += systemagent.c +romstage-y += ucode_update.c diff --git a/src/soc/intel/skylake/romstage/ucode_update.c b/src/soc/intel/skylake/romstage/ucode_update.c new file mode 100644 index 0000000..9a74c0a --- /dev/null +++ b/src/soc/intel/skylake/romstage/ucode_update.c @@ -0,0 +1,285 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/cpu.h> +#include <arch/early_variables.h> +#include <arch/io.h> +#include <arch/symbols.h> +#include <assert.h> +#include <cpu/x86/mtrr.h> +#include <cpu/x86/msr.h> +#include <cbmem.h> +#include <chip.h> +#include <console/console.h> +#include <cpu/intel/microcode.h> +#include <fmap.h> +#include <spi_flash.h> +#include <spi-generic.h> +#include <string.h> +#include <stdlib.h> +#include <stdint.h> +#include <timestamp.h> +#include <security/vboot/vboot_common.h> +#include <ec/google/chromeec/ec.h> +#include <reset.h> +#include <intelblocks/lpc_lib.h> +#include <soc/ucode_update.h> +#include <intelblocks/rtc.h> +#include <lib.h> +#include <soc/fw_update_nv.h> + +/* convert a pointer to flash area into the offset inside the flash */ +static inline u32 to_flash_offset(void *p) { + return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE); +} + +static void _hard_reset (void){ + hard_reset(); +} + +static int init_state_nv_storage(struct region_device *update_nv, + struct fw_update_nv *update_state) +{ + char empty_nv[FW_UPDATE_NV_DATA_SIZE]; + int i; + + if (get_update_nv_storage(update_nv)) { + printk (BIOS_ERR, "Update NV could not be init\n"); + return 1; + } + + if (get_update_state(update_nv, update_state)) { + printk (BIOS_ERR, "Error reading update state\n"); + return 1; + } + /* if empty, set initial state. This should be done only during first boot */ + for (i=0;i<FW_UPDATE_NV_DATA_SIZE;i++) + empty_nv[i] = ERASE_VALUE; + + hexdump((void *)update_state, FW_UPDATE_NV_DATA_SIZE); + + if (!memcmp((void *)&empty_nv, (void *)update_state, + FW_UPDATE_NV_DATA_SIZE)) { + printk (BIOS_ERR, "Initializing NV\n"); + update_state->ucode_state = UPDATE_VERIFIED; + update_state->cse_state = UPDATE_VERIFIED; + update_state->initialized = 1; + if (set_update_state(update_nv, update_state)) { + printk (BIOS_ERR, "Couldn't write to NV region\n"); + return 1; + } + } + return 0; +} + +static int write_ucode(struct region_device *rdev, void *ucode_stage, + void *cbfs_ucode) +{ + struct spi_flash flash; + + spi_init(); + + if (spi_flash_probe(0, 0, &flash)) { + printk(BIOS_DEBUG, "Could not find SPI device\n"); + return 1; + } + + if (spi_flash_erase(&flash, + to_flash_offset(ucode_stage) & 0xFFFFFF, + region_device_sz(rdev))){ + printk (BIOS_ERR, + "Failed to erase staging ucode\n"); + return 1; + /*TODO: reset*/ + } + + if(spi_flash_write(&flash, + to_flash_offset(ucode_stage) & 0xFFFFFF, + (size_t) get_microcode_size(cbfs_ucode), cbfs_ucode)){ + printk (BIOS_ERR, + "Failed to update staging ucode\n"); + return 1; + /*TODO: reset*/ + } + + return 0; +} + +static void *get_ucode_staging_area(struct region_device *rdev) +{ + void *ucode_stage = NULL; + + /* Get staging microcode */ + if (fmap_locate_area_as_rdev(CONFIG_INTEL_TOP_SWAP_FIT_ENTRY, + rdev) == 0) { + ucode_stage = rdev_mmap_full(rdev); + if (ucode_stage == NULL ) + printk(BIOS_DEBUG, "ucode staging could not be mapped\n"); + } else { + printk(BIOS_ERR, "ucode stage not found"); + } + + return ucode_stage; +} + +#if 0 +static int is_microcode_header_empty(void * microcode) +{ + char empty_ucode_header[48]; + int i; + + /* if empty, set initial state. This should be done only during first boot */ + for (i = 0; i < 48; i++) + empty_ucode_header[i] = ERASE_VALUE; + + hexdump(microcode, 48); + hexdump((void*)&empty_ucode_header, 48); + if (memcmp((void*)&empty_ucode_header, microcode, 48)) + return 0; + else + return 1; + +} +#endif + +int check_and_update_ucode(void) +{ + uint32_t current_ucode, slot_rev, staging_rev, version_mismatch = 0; + struct region_device rdev; + struct region_device upd_state_nv; + struct fw_update_nv upd_state; + const void *slot_microcode = NULL; + const void *staging_microcode = NULL; + + if (init_state_nv_storage(&upd_state_nv, &upd_state)){ + die("Failed to Initialize update state NV\n"); + } + + /* Get top swap status */ + enum ts_config ts_strap = get_rtc_buc_top_swap_status(); + /* Get recovery mode */ + int rec_mode = vboot_recovery_mode_enabled(); + + /* Get Ucode versions */ + current_ucode = get_current_microcode_rev(); + + slot_microcode = intel_microcode_find(); + slot_rev = get_microcode_rev(slot_microcode) - 1; + + staging_microcode = get_ucode_staging_area(&rdev); + if (staging_microcode == NULL) + return 1; + + staging_rev = get_microcode_rev(staging_microcode) - 1; + + printk(BIOS_DEBUG, "Top Swap: 0x%x\n", ts_strap); + printk(BIOS_DEBUG, "Recovery Mode: 0x%x\n", rec_mode); + printk(BIOS_DEBUG, "Current ucode version: 0x%x\n", current_ucode); + printk(BIOS_DEBUG, "Slot ucode version: 0x%x\n", slot_rev); + printk(BIOS_DEBUG, "Staging area ucode: 0x%x\n", staging_rev); + printk(BIOS_DEBUG, "Update State: 0x%x\n", upd_state.ucode_state); + + if (staging_rev != current_ucode || current_ucode != slot_rev || + staging_rev != slot_rev) + version_mismatch = 1; + + printk(BIOS_DEBUG, "Mismatch: 0x%x\n", version_mismatch); + + if (!rec_mode) { + switch (upd_state.ucode_state) { + case UPDATE_VERIFIED: + if (version_mismatch) { + if (!ts_strap) { + /* We are using a RO ucode, switch to + * top swap FIT. + */ + configure_rtc_buc_top_swap(TS_ENABLE); + _hard_reset(); + } + /* New ucode available, start update process */ + upd_state.ucode_state = UPDATE_START; + if (set_update_state(&upd_state_nv, &upd_state)) + return 1; + if (write_ucode(&rdev, (void *)staging_microcode, + (void *)slot_microcode)) { + printk (BIOS_ERR, "Write failed\n"); + return 1; + } + /* Finished writing, reset */ + upd_state.ucode_state = UPDATE_WRITE_COMPLETE; + if (set_update_state(&upd_state_nv, &upd_state)) { + return 1; + } + _hard_reset(); + } + break; + case UPDATE_WRITE_COMPLETE: + if (version_mismatch) { + if (!ts_strap) { + /* We are using a RO ucode, switch to + * top swap FIT. + */ + configure_rtc_buc_top_swap(TS_ENABLE); + _hard_reset(); + } else { + /* The right ucode could not be loaded + * even after the update. Fallback to + * the previous slot. + */ + } + } else { + /* Update is good, mark verified and continue */ + upd_state.ucode_state = UPDATE_VERIFIED; + if (set_update_state(&upd_state_nv, &upd_state)) + return 1; + } + break; + case UPDATE_START: + /* The previous update did not complete, retry */ + if (!ts_strap) { + /* We are using a RO ucode, switch to + * top swap FIT. + */ + configure_rtc_buc_top_swap(TS_ENABLE); + _hard_reset(); + } + if (write_ucode(&rdev, (void *)staging_microcode, + (void *)slot_microcode)) { + printk (BIOS_ERR, "Write failed\n"); + return 1; + } + upd_state.ucode_state = UPDATE_WRITE_COMPLETE; + if (set_update_state(&upd_state_nv, &upd_state)) { + return 1; + } + _hard_reset(); + } + } else { + /*In recovery, make sure topswap is disabled */ + if (ts_strap) { + configure_rtc_buc_top_swap(TS_DISABLE); + _hard_reset(); + } + } + /* Protect the RW ucode staging area */ + if (spi_flash_ctrlr_protect_region(boot_device_spi_flash(), + &rdev.region) < 0) { + printk(BIOS_ERR, "ERROR setting FPR for staging.\n"); + return 1; + } + + return 0; +} +