Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36552 )
Change subject: soc/intel/tigerlake/romstage: Do initial SoC commit till romstage ......................................................................
Patch Set 6:
(5 comments)
https://review.coreboot.org/c/coreboot/+/36552/6/src/soc/intel/tigerlake/inc... File src/soc/intel/tigerlake/include/soc/romstage.h:
https://review.coreboot.org/c/coreboot/+/36552/6/src/soc/intel/tigerlake/inc... PS6, Line 21: FSPM_UPD
non existent header
this should be handled with FSP header upload CL as Ravi already submitted.
https://review.coreboot.org/c/coreboot/+/36552/6/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/36552/6/src/soc/intel/tigerlake/rom... PS6, Line 19: FSPM_UPD
defined in non existent header
this should be handled with FSP header upload CL as Ravi already submitted.
https://review.coreboot.org/c/coreboot/+/36552/6/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/36552/6/src/soc/intel/tigerlake/rom... PS6, Line 42: CONTROLLER_INFO
defined in non existent header
this should be handled with FSP header upload CL as Ravi already submitted.
https://review.coreboot.org/c/coreboot/+/36552/6/src/soc/intel/tigerlake/rom... PS6, Line 43: CHANNEL_INFO
defined in non existent header
same
https://review.coreboot.org/c/coreboot/+/36552/6/src/soc/intel/tigerlake/rom... PS6, Line 47: MEMORY_INFO_DATA_HOB
defined in non existent header
same