Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX window ......................................................................
soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX window
For low frequency (e.g., 1600 or 2400 Mbps) we can do fast calibration for TX and RX window. However, for high frequency (e.g., 3200 or 3600 Mbps) a full calibration is needed.
BUG=b:80501386,b:142358843 BRANCH=kukui TEST=Boots correctly on Kukui Signed-off-by: Huayang Duan huayang.duan@mediatek.com
Change-Id: I00d563ece4cf91ef5e8e12b6cf7f777849375a24 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36921 Reviewed-by: Hung-Te Lin hungte@chromium.org Reviewed-by: Yu-Ping Wu yupingso@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/mediatek/mt8183/dramc_pi_calibration_api.c 1 file changed, 5 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, but someone else must approve
diff --git a/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c index cd9f328..8c17d84 100644 --- a/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c +++ b/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c @@ -1788,8 +1788,9 @@
u8 fsp = get_freq_fsq(freq_group); u8 vref_range = !fsp; - bool bypass_tx = !fsp; + bool bypass_tx_rx = !fsp;
+ dramc_dbg("bypass TX RX window: %s\n", bypass_tx_rx ? "Yes" : "No"); dramc_get_vref_prop(rank, type, fsp, &vref_scan_enable, &vref_begin, &vref_end); dramc_get_dly_range(chn, rank, type, freq_group, dq_precal_result, @@ -1826,9 +1827,9 @@ vref_step = 2; }
- if (fast_calib && bypass_tx && + if (fast_calib && bypass_tx_rx && (type == TX_WIN_DQ_ONLY || type == TX_WIN_DQ_DQM)) { - dramc_set_tx_best_dly(chn, rank, true, vref_dly.perbit_dly, + dramc_set_tx_best_dly(chn, rank, bypass_tx_rx, vref_dly.perbit_dly, type, freq_group, dq_precal_result, dly_cell_unit, params, fast_calib);
@@ -1872,7 +1873,7 @@ RX_DQ, FIRST_DQ_DELAY); }
- if (fast_calib && + if (fast_calib && bypass_tx_rx && (type == RX_WIN_RD_DQC || type == RX_WIN_TEST_ENG)) { dramc_dbg("bypass RX params\n"); for (size_t bit = 0; bit < DQ_DATA_WIDTH; bit++) {