Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45941 )
Change subject: soc/intel/xeon_sp/cpx: correct GSI bases for IO APICs
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Patch Set 3: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/45941/2/src/soc/intel/xeon_sp/cpx/a...
File src/soc/intel/xeon_sp/cpx/acpi.c:
https://review.coreboot.org/c/coreboot/+/45941/2/src/soc/intel/xeon_sp/cpx/a...
PS2, Line 190: int gsi_bases[] = { 0, 0x78, 0x80, 0x28, 0x88, 0x90, 0x98, 0xA0, 0xA8, 0xB0 };
Done
Ah, I see now: 0, 120, 128, 136, 144, 152, 160, 168, 176
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I45e941591300dad6d583a6dcb41f45e984753c07
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