Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31435 )
Change subject: mb/ocp/monolake: Fix booting issues ......................................................................
mb/ocp/monolake: Fix booting issues
We experienced booting issues during FSP-M phase. Applying fix that was introduced for wedge100s - 817994c1bec (mb/ocp/wedge100s/romstage: Workaround broken platform state) - helped and systems started to boot properly.
Signed-off-by: Lukasz Siudut lsiudut@fb.com Change-Id: Ibfbe9d19c7413098c56d1b6131640097fdf731ab Reviewed-on: https://review.coreboot.org/c/31435 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Rudolph siro@das-labor.org Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net --- M src/mainboard/ocp/monolake/romstage.c 1 file changed, 17 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Patrick Rudolph: Looks good to me, approved
diff --git a/src/mainboard/ocp/monolake/romstage.c b/src/mainboard/ocp/monolake/romstage.c index cf52c01..2bb50f0 100644 --- a/src/mainboard/ocp/monolake/romstage.c +++ b/src/mainboard/ocp/monolake/romstage.c @@ -17,6 +17,9 @@ #include <stddef.h> #include <soc/romstage.h> #include <drivers/intel/fsp1_0/fsp_util.h> +#include <cpu/x86/msr.h> +#include <cf9_reset.h> +#include <console/console.h>
/** * /brief mainboard call for setup that needs to be done before fsp init @@ -24,7 +27,20 @@ */ void early_mainboard_romstage_entry(void) { - + /* + * Sometimes the system boots in an invalid state, where random values + * have been written to MSRs and then the MSRs are locked. + * Seems to always happen on warm reset. + * + * Power cycling or a board_reset() isn't sufficient in this case, so + * issue a full_reset() to "fix" this issue. + */ + msr_t msr = rdmsr(IA32_FEATURE_CONTROL); + if (msr.lo & 1) { + console_init(); + printk(BIOS_EMERG, "Detected broken platform state. Issuing full reset\n"); + full_reset(); + } }
/**