Hello Richard Spiegel, build bot (Jenkins), Martin Roth, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33767
to look at the new patch set (#15).
Change subject: soc/amd/picasso: Update UARTs ......................................................................
soc/amd/picasso: Update UARTs
Add a function to uart.c to ensure the right IOMux settings are programmed for the console UART. Update Kconfig to reflect the new addresses.
Give the user the ability to downclock the UARTs' refclock to 1.8342MHz.
Add the abiltiy to use an APU UART at a legacy I/O address.
Update the AOAC register configuration for the two additional UARTs.
Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com Change-Id: I74579674544f0edd2c0e6c4963270b442668e62f --- M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/acpi/globalnvs.asl M src/soc/amd/picasso/acpi/sb_fch.asl M src/soc/amd/picasso/acpi/sb_pci0_fch.asl M src/soc/amd/picasso/include/soc/iomap.h M src/soc/amd/picasso/include/soc/southbridge.h M src/soc/amd/picasso/southbridge.c M src/soc/amd/picasso/uart.c 8 files changed, 217 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/33767/15