Attention is currently required from: Felix Singer, Matt DeVillier, Nicholas Chin.
Joel Linn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81368?usp=email )
Change subject: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge) ......................................................................
Patch Set 4:
(14 comments)
File Documentation/mainboard/hp/pro_3500_series.md:
https://review.coreboot.org/c/coreboot/+/81368/comment/9dfe2c02_911fd010 : PS3, Line 17: eval_rst
Should be `{eval-rst}` after commit 35599f9a66 (Docs: Replace Recommonmark with MyST Parser)
Done FYI I noticed there is a number of places which still have "```eval_rst", should I open a ticket about them?
https://review.coreboot.org/c/coreboot/+/81368/comment/1b7bcfc5_5a148bd2 : PS3, Line 85: eval_rst
`{eval-rst}`
Done
https://review.coreboot.org/c/coreboot/+/81368/comment/1447c651_5846341d : PS3, Line 93: E
Remove "E" after "IT". I.e. […]
Done
File src/mainboard/hp/pro_3500_series/Kconfig:
https://review.coreboot.org/c/coreboot/+/81368/comment/2e640515_f48623e5 : PS3, Line 11: select INTEL_INT15
See my comment for mainboard. […]
Done
File src/mainboard/hp/pro_3500_series/Makefile.mk:
https://review.coreboot.org/c/coreboot/+/81368/comment/16758b8d_e50b2848 : PS3, Line 11: bootblock-y += led.c
Move to the other bootblock lines
Done
File src/mainboard/hp/pro_3500_series/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/81368/comment/f43435ef_24426250 : PS3, Line 4: register "gpu_dp_b_hotplug" = "0" : register "gpu_dp_c_hotplug" = "0" : register "gpu_dp_d_hotplug" = "0"
Set to 0 by default, remove
Done
https://review.coreboot.org/c/coreboot/+/81368/comment/cff74d1f_5f3922ae : PS3, Line 15: # Host bridge Host bridge
Remove superfluous comment
Done
https://review.coreboot.org/c/coreboot/+/81368/comment/fd938fcd_a6ae369d : PS3, Line 19: chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Remove devices which are set to off, as their config is equal to chipset devicetree.
Done
https://review.coreboot.org/c/coreboot/+/81368/comment/0f54399d_87dbbec7 : PS3, Line 22: register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
All set to 0, remove
Done
https://review.coreboot.org/c/coreboot/+/81368/comment/2202cdda_8db6ab57 : PS3, Line 50: subsystemid 0x103c 0x2abf
Can remove, already covered by the `subsystemid 0x103c 0x2abf inherit` earlier
Done
File src/mainboard/hp/pro_3500_series/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/81368/comment/c1a3f45f_f69f673c : PS3, Line 14: /* OEM revision */
Remove comment
Done
File src/mainboard/hp/pro_3500_series/mainboard.c:
https://review.coreboot.org/c/coreboot/+/81368/comment/d01a0071_72295ecb : PS2, Line 9: * FIXME: untested. */
Well the board boots with libgfxinit but so do others and they keep it as well. […]
Done
File src/mainboard/hp/pro_3500_series/mainboard.c:
PS3:
The INT15 handler is only needed when the proprietary VGA bios is used. […]
Done
File src/mainboard/hp/pro_3500_series/smihandler.c:
https://review.coreboot.org/c/coreboot/+/81368/comment/c027d73f_fcc19a51 : PS3, Line 12: */
No need for multiline comment, just use single line format
Done