[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: [TEST-ONLY] Enable Audio DSP OSC qualification ...

[Aamir Bohra (Code Review)]

Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37604 )

Change subject: soc/intel/cannonlake: [TEST-ONLY] Enable Audio DSP OSC qualification for low power idle
......................................................................

soc/intel/cannonlake: [TEST-ONLY] Enable Audio DSP OSC qualification for low power idle

Change-Id: I20b793b95483af03ce4ae068ac07864a9e90d39b
Signed-off-by: Aamir Bohra 
---
M src/soc/intel/cannonlake/finalize.c
M src/soc/intel/cannonlake/include/soc/pmc.h
2 files changed, 9 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/37604/1

diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c
index 115b732..a37ac98 100644
--- a/src/soc/intel/cannonlake/finalize.c
+++ b/src/soc/intel/cannonlake/finalize.c
@@ -92,11 +92,16 @@
    	write8(pmcbase + PCH_PWRM_ACPI_TMR_CTL, reg8);
    }

-	/* Disable XTAL shutdown qualification for low power idle. */
    if (config->s0ix_enable) {
+		/* Disable XTAL shutdown qualification for low power idle. */
    	reg32 = read32(pmcbase + CPPMVRIC);
    	reg32 |= XTALSDQDIS;
    	write32(pmcbase + CPPMVRIC, reg32);
+
+		/* Enable Audio DSP OSC qualification for low power idle. */
+		reg32 = read32(pmcbase + CPPMVRIC2);
+		reg32 &= ~ADSPOSCDIS;
+		write32(pmcbase + CPPMVRIC2, reg32);
    }

pch_handle_sideband(config);
diff --git a/src/soc/intel/cannonlake/include/soc/pmc.h b/src/soc/intel/cannonlake/include/soc/pmc.h
index 252c719..878271c 100644
--- a/src/soc/intel/cannonlake/include/soc/pmc.h
+++ b/src/soc/intel/cannonlake/include/soc/pmc.h
@@ -156,6 +156,9 @@
 #define CPPMVRIC			0x1B1C
 #define   XTALSDQDIS			(1 << 22)

+#define CPPMVRIC2			0x1B1C
+#define   ADSPOSCDIS			(1 << 22)
+
 #define IRQ_REG				ACTL
 #define SCI_IRQ_ADJUST			0
 #define ACTL				0x1BD8