[coreboot-gerrit] Change in ...coreboot[master]: drivers/cavium: Add UART PCI driver

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30608 )

Change subject: drivers/cavium: Add UART PCI driver
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Patch Set 2:
> On a related topic; I looked at definitions of 'struct cn81xx_uart'
> and 'struct pl011_uart'. Since those need to match hardware
> register layout, shouldn't they have attribute __packed applied?
> Or are we happy with the check_member() asserts here that check
> overall size.
>
> As for the bitfields in 'union cn81xx_uart_ctl'; from what I
> remember C standard does not dictate if first field occupies MSB or
> LSB, and its relevant here as well.

Yes, they should be packed and should work for all endianes.
ATM the Cavium Soc always operate in LE mode.