Nico Huber (nico.h@gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18294
-gerrit
commit a6ed6c031fcf1124d2b2c58d5c67e8fcc84cefd5 Author: Arthur Heymans arthur@aheymans.xyz Date: Mon Feb 6 15:08:04 2017 +0100
nb/i945/gma.c: Remove writes to FIFO Watermark registers
Those are the result from tracing what linux or the option rom do but are not needed here.
TESTED on Thinkpad X60.
Change-Id: I4297a78c4ab6a19ef6161778c993fc3f3fb08c7e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- src/northbridge/intel/i945/gma.c | 8 -------- 1 file changed, 8 deletions(-)
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index 0d4ca43..eac8717 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -293,14 +293,6 @@ static int intel_gma_init_lvds(struct northbridge_intel_i945_config *conf, write32(mmiobase + DSPPOS(0), 0);
/* Backlight init. */ - write32(mmiobase + FW_BLC_SELF, FW_BLC_SELF_EN_MASK); - write32(mmiobase + FW_BLC, 0x011d011a); - write32(mmiobase + FW_BLC2, 0x00000102); - write32(mmiobase + FW_BLC_SELF, FW_BLC_SELF_EN_MASK); - write32(mmiobase + FW_BLC_SELF, 0x0001003f); - write32(mmiobase + FW_BLC, 0x011d0109); - write32(mmiobase + FW_BLC2, 0x00000102); - write32(mmiobase + FW_BLC_SELF, FW_BLC_SELF_EN_MASK); write32(mmiobase + BLC_PWM_CTL, conf->gpu_backlight);
edid.bytes_per_line = (edid.bytes_per_line + 63) & ~63;