[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Pass FSPM_UPD * to mainboard_memory_init_params

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62438 )

Change subject: soc/intel/alderlake: Pass FSPM_UPD * to mainboard_memory_init_params
......................................................................

soc/intel/alderlake: Pass FSPM_UPD * to mainboard_memory_init_params

This change alters the parameter of alderlake's
mainboard_memory_init_params function to accept a `FSPM_UPD *` parameter
instead of `FSP_M_CONFIG *`. This would allow the mainboard function to
change, e.g. Arch UPDs as well.

Signed-off-by: Tim Wawrzynczak 
Change-Id: Ib4bfa6f4ea90adbbd9891e250ba9774503fc8e7e
---
M src/mainboard/google/brya/romstage.c
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
M src/soc/intel/alderlake/include/soc/romstage.h
M src/soc/intel/alderlake/romstage/fsp_params.c
4 files changed, 7 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/62438/1

diff --git a/src/mainboard/google/brya/romstage.c b/src/mainboard/google/brya/romstage.c
index d50d6e8..0f4f74c 100644
--- a/src/mainboard/google/brya/romstage.c
+++ b/src/mainboard/google/brya/romstage.c
@@ -7,11 +7,12 @@
 #include <soc/romstage.h>
 #include <string.h>

-void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
+void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
    const struct mb_cfg *mem_config = variant_memory_params();
    bool half_populated = variant_is_half_populated();
    struct mem_spd spd_info;
+	FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;

memset(&spd_info, 0, sizeof(spd_info));
    variant_get_spd_info(&spd_info);
diff --git a/src/mainboard/intel/adlrvp/romstage_fsp_params.c b/src/mainboard/intel/adlrvp/romstage_fsp_params.c
index 56bd0cd..c0e0087 100644
--- a/src/mainboard/intel/adlrvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/adlrvp/romstage_fsp_params.c
@@ -42,11 +42,12 @@
    	m_cfg->PcieClkSrcUsage[i] = CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER;
 }

-void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
+void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
    const struct mb_cfg *mem_config = variant_memory_params();
    int board_id = get_board_id();
    const bool half_populated = false;
+	FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;

const struct mem_spd memory_down_spd_info = {
    	.topo = MEM_TOPO_MEMORY_DOWN,
diff --git a/src/soc/intel/alderlake/include/soc/romstage.h b/src/soc/intel/alderlake/include/soc/romstage.h
index 3b51b69..e0b5c23 100644
--- a/src/soc/intel/alderlake/include/soc/romstage.h
+++ b/src/soc/intel/alderlake/include/soc/romstage.h
@@ -6,7 +6,7 @@
 #include <fsp/api.h>
 #include <stddef.h>

-void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg);
+void mainboard_memory_init_params(FSPM_UPD *m_cfg);
 void systemagent_early_init(void);

/* Board type */
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index 23e8265..751b2411 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -361,10 +361,10 @@
    config = config_of_soc();

soc_memory_init_params(m_cfg, config);
-	mainboard_memory_init_params(m_cfg);
+	mainboard_memory_init_params(mupd);
 }

-__weak void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
+__weak void mainboard_memory_init_params(FSPM_UPD *m_cfg)
 {
    printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
 }