Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36915 )
Change subject: pcengines/apu2: Switch away from ROMCC_BOOTBLOCK ......................................................................
Patch Set 34:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36915/30/src/mainboard/pcengines/ap... File src/mainboard/pcengines/apu2/romstage.c:
https://review.coreboot.org/c/coreboot/+/36915/30/src/mainboard/pcengines/ap... PS30, Line 66: pci_write_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE, data | 3);
Not exactly. LPC decode for SuperIO ports was never there actually. […]
LPC_IO_PORT_DECODE_ENABLE LPC_IO_OR_MEM_DECODE_ENABLE
I did not notice the difference between the two above, specially when it was split across two files.
Once ROMCC_BOOTBLOCK is gone we may want to push more of the implementation into hudson/early_setup.c. This may not be of much importance with APUx (yet) but we should consider cases of size-constrained and read-only bootblocks where console is left uninitialized, and we need that code to run in early romstage.
We had some ideas of keeping only CBMEM console in bootblock and then one could, for debugging purposes, initialize a slow and complex console (SPI flash, EHCI debug) in romstage and replay CBMEM contents then.
We also need to evalute PMxEC bit 0, LPC enable bit. Current implementation inside hudson_lpc_port80() is only conditionally executed.