[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add Iccmax and loadlines for CML-S

[Gaggery Tsai (Code Review)]

Hello build bot (Jenkins), Jamie Chen, Rizwan Qureshi, Angel Pons, Subrata Banik, Balaji Manigandan, Michael Niewöhner, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38288

to look at the new patch set (#4).

Change subject: soc/intel/cannonlake: Add Iccmax and loadlines for CML-S
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soc/intel/cannonlake: Add Iccmax and loadlines for CML-S

Following up 3ccae2b7, this patch adds Iccmax and AC/DC
loadlines and iPL2 for CML-S CPUs. The information is from
CML EDS volume 1, doc #606599 and pdg #610244.

Change-Id: Id2797a979a8b6a52a34baae66f95c7136ed1dc72
Signed-off-by: Gaggery Tsai 
---
M src/soc/intel/cannonlake/vr_config.c
1 file changed, 33 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/38288/4