[coreboot-gerrit] Change in coreboot[master]: mb/intel/adlrvp: Update HPD1/2 GPIO as per latest schematics

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47683 )

Change subject: mb/intel/adlrvp: Update HPD1/2 GPIO as per latest schematics
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mb/intel/adlrvp: Update HPD1/2 GPIO as per latest schematics

HPD_1: A19 -> E14
HPD_2: A20 -> A18

Change-Id: Idf3c8f4931bf8364bb9216a9369df7e05dcde047
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47683
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/mainboard/intel/adlrvp/gpio.c
1 file changed, 3 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c
index 039a437..a44d4ac 100644
--- a/src/mainboard/intel/adlrvp/gpio.c
+++ b/src/mainboard/intel/adlrvp/gpio.c
@@ -277,9 +277,9 @@
    PAD_CFG_NF(GPP_A21, NONE, DEEP, NF2),
    PAD_CFG_NF(GPP_A22, NONE, DEEP, NF2),

-	/* HPD_1 (A19) and HPD_2 (A20) pins */
-	PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
+	/* HPD_1 (E14) and HPD_2 (A18) pins */
+	PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),

/* IMGCLKOUT */
    PAD_CFG_NF(GPP_D4, NONE, DEEP, NF1),