20 Dec
2021
20 Dec
'21
9:12 p.m.
Attention is currently required from: Raul Rangel. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60172 )
Change subject: soc/amd/cezanne/acpi: Add support for RTC workaround ......................................................................
Patch Set 2:
(2 comments)
File src/soc/amd/cezanne/acpi/rtc_workaround.asl:
https://review.coreboot.org/c/coreboot/+/60172/comment/843223d5_772dd8e4 PS2, Line 23: _E2C I am not seeing a documentation for this method. Can you please point me to that?
https://review.coreboot.org/c/coreboot/+/60172/comment/f04c61ab_64b4f5cb PS2, Line 24: _SB_ Is this extra underscore a typo?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1f14d14df5d30d48d244416f2ec8c10ac5c8040e
Gerrit-Change-Number: 60172
Gerrit-PatchSet: 2
Gerrit-Owner: Raul Rangel rrangel@chromium.org
Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de
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