[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/{skylake,cannonlake,icelake}: Correct GPIO IRQ start map

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31245 )

Change subject: soc/intel/{skylake,cannonlake,icelake}: Correct GPIO IRQ start map
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Patch Set 1:

(2 comments)

https://review.coreboot.org/#/c/31245/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/31245/1//COMMIT_MSG@14 
PS1, Line 14: [TESTED on CNL-ONLY]
Can you please test this on some KBL board?

https://review.coreboot.org/#/c/31245/1/src/soc/intel/cannonlake/include/soc... 
File src/soc/intel/cannonlake/include/soc/itss.h:

https://review.coreboot.org/#/c/31245/1/src/soc/intel/cannonlake/include/soc... 
PS1, Line 19: 24
> Ok, for that it had to be 32. […]

restoring of polarities already takes care of updating only the right bits based on start offset.