[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Implement PMC soft strap interface lock

[Subrata Banik (Code Review)]

Attention is currently required from: Tim Wawrzynczak.
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63690 )

Change subject: soc/intel/alderlake: Implement PMC soft strap interface lock
......................................................................

soc/intel/alderlake: Implement PMC soft strap interface lock

This patch implements API to perform locking of the PMC soft strap
interface using CPU Strap IPC command.

BUG=b:211954778
TEST=Able to build and boot google/redrix to OS.

Signed-off-by: Subrata Banik 
Change-Id: I1ae972a203affa54c03de71f0f702356334cbf7d
---
M src/soc/intel/alderlake/lockdown.c
1 file changed, 22 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/63690/1

diff --git a/src/soc/intel/alderlake/lockdown.c b/src/soc/intel/alderlake/lockdown.c
index f7b2f3c..3e05b0d 100644
--- a/src/soc/intel/alderlake/lockdown.c
+++ b/src/soc/intel/alderlake/lockdown.c
@@ -8,10 +8,14 @@

#include <device/mmio.h>
 #include <intelblocks/cfg.h>
+#include <intelblocks/pmc_ipc.h>
 #include <intelpch/lockdown.h>
 #include <soc/pm.h>
 #include <stdint.h>

+#define PMC_IPC_CPU_STRAP		0xB1
+#define  PMC_IPC_CPU_STRAP_LOCK	0
+
 static void pmc_lock_pmsync(void)
 {
    uint8_t *pmcbase;
@@ -55,6 +59,21 @@
    setbits32(pmcbase + ST_PG_FDIS1, ST_FDIS_LOCK);
 }

+static void pmc_soft_strap_interface_lock(void)
+{
+	struct pmc_ipc_buffer req = { 0 };
+	struct pmc_ipc_buffer rsp;
+	uint32_t cmd;
+
+	cmd = pmc_make_ipc_cmd(PMC_IPC_CPU_STRAP, PMC_IPC_CPU_STRAP_LOCK, 0);
+	if (pmc_send_ipc_cmd(cmd, &req, &rsp) != CB_SUCCESS) {
+		printk(BIOS_ERR, "PMC: Failed to lock Soft Strap Interface\n");
+		return;
+	}
+
+	return;
+}
+
 static void pmc_lockdown_cfg(int chipset_lockdown)
 {
    /* PMSYNC */
@@ -65,8 +84,10 @@
    if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT)
    	pmc_lock_smi();

-	if (!CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM))
+	if (!CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM)) {
    	pmc_st_pg_lock();
+		pmc_soft_strap_interface_lock();
+	}
 }

void soc_lockdown_config(int chipset_lockdown)