Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40291 )
Change subject: vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profiles ......................................................................
Patch Set 17:
Patch Set 17:
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It's related to issue in thread https://mail.coreboot.org/pipermail/coreboot/2014-March/077418.html - ariphmetic (division?) error at ./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.c - line 334 - which happens only if RAM frequency is 1866MHz! When I forced a 1600MHz by changing "#define BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT DDR1866_FREQUENCY" to DDR1600_FREQUENCY at ./src/mainboard/asus/a88xm-e/buildOpts.c , a board booted fine. So need to investigate if it's something as simple as changing i.e. memps0_freq from 0 to 1, or everything is tied to the hardcoded values and hardly fixable. At least the 1600MHz timings are good enough in case I would fail.
Can you add debug print statements to the if statement
if (!DctChannel.D18F2x94_dct0.Field.DisDramInterface)
to see what branch is chosen, and what values it is set to?
In AMD Family 16h (from 2013 instead 2012) the code seems to have been moved to `src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxIntegratedInfoTableKB.c`.