[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8183: Tx delay cell should use ddr clock do compute

[Hung-Te Lin (Code Review)]

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36990 )

Change subject: soc/mediatek/mt8183: Tx delay cell should use ddr clock do compute
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/36990/2/src/soc/mediatek/mt8183/dra... 
File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:

https://review.coreboot.org/c/coreboot/+/36990/2/src/soc/mediatek/mt8183/dra... 
PS2, Line 1608: 1792
@huayang, why is this 1792? The delta is more than other (8), also it's too different from original value (1866->1800-4)