Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45391 )
Change subject: drivers/intel/fsp2_0: ask FSP to allocate APEI BERT memory region ......................................................................
Patch Set 1:
(4 comments)
https://review.coreboot.org/c/coreboot/+/45391/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45391/1//COMMIT_MSG@7 PS1, Line 7: ask Use
https://review.coreboot.org/c/coreboot/+/45391/1//COMMIT_MSG@20 PS1, Line 20: I am confused by this commit message. Some explanation of why this needs to be allocated this way would be helpful.
https://review.coreboot.org/c/coreboot/+/45391/1/src/drivers/intel/fsp2_0/cb... File src/drivers/intel/fsp2_0/cbmem.c:
https://review.coreboot.org/c/coreboot/+/45391/1/src/drivers/intel/fsp2_0/cb... PS1, Line 15: } It doesn't seem like cbmem_top_chipset() should change. It would be useful to to have a *bert_base() to be used and not have bert and chipset code assume bert is above cbmem. Also used in the hob_verify.c to checkit's location and size.
https://review.coreboot.org/c/coreboot/+/45391/1/src/drivers/intel/fsp2_0/ho... File src/drivers/intel/fsp2_0/hob_verify.c:
https://review.coreboot.org/c/coreboot/+/45391/1/src/drivers/intel/fsp2_0/ho... PS1, Line 47: printk(BIOS_DEBUG, "TOLUM end: 0x%08llx != %p: cbmem_top\n", It seems that this should do the correct check for tolum, cbmem_top, and bert.