[coreboot-gerrit] [S] Change in coreboot[main]: arch/riscv: minimal changes to get sifive unmatched with non-SMP

[ron minnich (Code Review)]

Attention is currently required from: Philipp Hug.

ron minnich has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81308?usp=email )

Change subject: arch/riscv: minimal changes to get sifive unmatched with non-SMP
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Patch Set 4:

(1 comment)

File src/arch/riscv/payload.c:

https://review.coreboot.org/c/coreboot/+/81308/comment/eff8c320_243b2042 :
PS4, Line 91: 		write_csr(mie, 0);
is this a mistake?  Hug, any comment here?