[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Update PCH and CPU PCIe RP table

[EricR Lai (Code Review)]

Attention is currently required from: Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Michael Niewöhner.
EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49021 )

Change subject: soc/intel/alderlake: Update PCH and CPU PCIe RP table
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Patch Set 4:

(2 comments)

File src/soc/intel/alderlake/include/soc/pci_devs.h:

https://review.coreboot.org/c/coreboot/+/49021/comment/88eb2745_0e2126fd 
PS4, Line 40: PCH
> SA

Done

File src/soc/intel/alderlake/pcie_rp.c:

https://review.coreboot.org/c/coreboot/+/49021/comment/51444602_f03ead01 
PS2, Line 18: /* TODO check how to determine CPU PCIE port */
> > If the indexes match the port numbers in the link capabilities […]

wait for your new patch, I leave TODO here.