[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell: Guard DMIBAR/EPBAR macro parameters

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45352 )

Change subject: nb/intel/haswell: Guard DMIBAR/EPBAR macro parameters
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nb/intel/haswell: Guard DMIBAR/EPBAR macro parameters

Add brackets around the parameters to avoid operation order problems.

Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.

Change-Id: I5e1a02ba2ebf468f0d80b7f1838766280b6b7b22
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45352
Reviewed-by: Tim Wawrzynczak 
Tested-by: build bot (Jenkins) 
---
M src/northbridge/intel/haswell/haswell.h
1 file changed, 6 insertions(+), 6 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index 00cc885..f3f525d 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -57,9 +57,9 @@
  * EPBAR - Egress Port Root Complex Register Block
  */

-#define EPBAR8(x)  *((volatile u8  *)(DEFAULT_EPBAR + x))
-#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + x))
-#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + x))
+#define EPBAR8(x)  *((volatile u8  *)(DEFAULT_EPBAR + (x)))
+#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + (x)))
+#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + (x)))

#define EPPVCCAP1	0x004	/* 32bit */
 #define EPPVCCAP2	0x008	/* 32bit */
@@ -88,9 +88,9 @@
  * DMIBAR
  */

-#define DMIBAR8(x)  *((volatile u8  *)(DEFAULT_DMIBAR + x))
-#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + x))
-#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + x))
+#define DMIBAR8(x)  *((volatile u8  *)(DEFAULT_DMIBAR + (x)))
+#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + (x)))
+#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + (x)))

#define DMIVCECH	0x000	/* 32bit */
 #define DMIPVCCAP1	0x004	/* 32bit */