Julius Werner has posted comments on this change. ( https://review.coreboot.org/23515 )
Change subject: rockchip/rk3399: add the delay time between saradc power up and start command ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/23515/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/23515/1//COMMIT_MSG@13 PS1, Line 13: I assume this is BUG=b:70692504? And please also mark it with BRANCH=gru.
https://review.coreboot.org/#/c/23515/1/src/soc/rockchip/rk3399/saradc.c File src/soc/rockchip/rk3399/saradc.c:
https://review.coreboot.org/#/c/23515/1/src/soc/rockchip/rk3399/saradc.c@74 PS1, Line 74: udelay(SARADC_DELAY_PU); This jumps from 250us to 8ms, which puts it well within the "uncomfortable" range of boot delays for me. Remember that we eat this 5 or so times per boot, so this is a whooping 40ms. Is it really necessary to do such an extreme change to fix this issue? I think if this delay went up to only 1ms per call (that's still 4 times as much as right now!), like with 4 samples delay at 4MHz, I'd be okay with it.
If you really need this to be that long, then I think we need to factor an init_saradc() function out so that we at least only have to eat the delay once per ADC. But that would get more complicated again because we may need to RW-update this onto older RO firmware, so I'd really rather not go there...