Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45391 )
Change subject: drivers/intel/fsp2_0: ask FSP to allocate APEI BERT memory region ......................................................................
drivers/intel/fsp2_0: ask FSP to allocate APEI BERT memory region
APEI (ACPI Platform Error Interface) defines BERT (Boot Error Record Table) memory region: * Bootloader (firmware) generates UEFI CPER (Common Platform Error Record) records, and populates BERT region. In case of FSP 2.x, coreboot gets BERT region raw data from FSP (PREV_BOOT_ERROR_SRC_HOB). * OS parses ACPI BERT table, finds the BERT region address, inteprets the data and processes it accordingly.
When CONFIG_ACPI_BERT is defined, update FSP UPD BootLoaderTolumSize, so FSP allocates memory region for it. The APEI BERT region is placed on top of CBMEM, for the size of CONFIG_ACPI_BERT_SIZE.
Change-Id: Ie72240e4c5fa01fcf937d33678c40f9ca826487a Signed-off-by: Jonathan Zhang jonzhang@fb.com --- M src/drivers/intel/fsp2_0/cbmem.c M src/drivers/intel/fsp2_0/hob_verify.c M src/drivers/intel/fsp2_0/memory_init.c 3 files changed, 21 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/45391/1
diff --git a/src/drivers/intel/fsp2_0/cbmem.c b/src/drivers/intel/fsp2_0/cbmem.c index 0efb462..f836b36 100644 --- a/src/drivers/intel/fsp2_0/cbmem.c +++ b/src/drivers/intel/fsp2_0/cbmem.c @@ -6,7 +6,10 @@ void *cbmem_top_chipset(void) { struct range_entry tolum; + void *tolum_base;
fsp_find_bootloader_tolum(&tolum); - return (void *)(uintptr_t)range_entry_end(&tolum); + tolum_base = (void *)(uintptr_t)range_entry_base(&tolum); + + return tolum_base + cbmem_overhead_size(); } diff --git a/src/drivers/intel/fsp2_0/hob_verify.c b/src/drivers/intel/fsp2_0/hob_verify.c index ec526e8..94fc653e 100644 --- a/src/drivers/intel/fsp2_0/hob_verify.c +++ b/src/drivers/intel/fsp2_0/hob_verify.c @@ -43,9 +43,7 @@ die("Space between FSP reserved region and BIOS TOLUM!\n"); }
- if (range_entry_end(&tolum) != (uintptr_t)cbmem_top()) { - printk(BIOS_CRIT, "TOLUM end: 0x%08llx != %p: cbmem_top\n", + if (range_entry_end(&tolum) != (uintptr_t)cbmem_top()) + printk(BIOS_DEBUG, "TOLUM end: 0x%08llx != %p: cbmem_top\n", range_entry_end(&tolum), cbmem_top()); - die("Space between cbmem_top and BIOS TOLUM!\n"); - } } diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 07c4463..1ef9324 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -276,6 +276,21 @@ /* Reserve enough memory under TOLUD to save CBMEM header */ arch_upd->BootLoaderTolumSize = cbmem_overhead_size();
+ /* + * If ACPI APEI BERT region size is defined, reserve memory for it. + * +------------------------+ range_entry_top(tolum) + * | Other reserved regions | + * | APEI BERT region | + * +------------------------+ cbmem_top() + * | CBMEM IMD ROOT | + * | CBMEM IMD SMALL | + * +------------------------+ range_entry_base(tolum), TOLUM + * | CBMEM FSP MEMORY | + * | Other CBMEM regions... | + */ + if (CONFIG(ACPI_BERT)) + arch_upd->BootLoaderTolumSize += CONFIG_ACPI_BERT_SIZE; + /* Fill common settings on behalf of chipset. */ if (fsp_fill_common_arch_params(arch_upd, s3wake, fsp_version, memmap) != CB_SUCCESS)